762 research outputs found
Architectures for block Toeplitz systems
In this paper efficient VLSI architectures of highly concurrent algorithms for the solution of block linear systems with Toeplitz or near-to-Toeplitz entries are presented. The main features of the proposed scheme are the use of scalar only operations, multiplications/divisions and additions, and the local communication which enables the development of wavefront array architecture. Both the mean squared error and the total squared error formulations are described and a variety of implementations are given
CAD Tool Design for NCL and MTNCL Asynchronous Circuits
This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and Synopsis CAD tools, using a C-program, which performs the majority of the computations, such that the method can be easily ported to other CAD tool suites. Both methods have been successfully tested on circuits, including a 4-bit Ă 4-bit multiplier, an unsigned Booth2 multiplier, and a 4-bit/8-operation arithmetic logic unit (ALU
C-SIDE: The control-structure interaction demonstration experiment
The Control-Structure Interaction Demonstration Experiment (C-SIDE) is sponsored by the Electro-Optics and Cryogenics Division of Ball Aerospace Systems Group. Our objective is to demonstrate methods of solution to structure control problems utilizing currently available hardware in a system that is an extension of our corporate experience. The larger space structures with which Ball has been associated are the SEASAT radar antenna, Shuttle Imaging Radar (SIR) -A, -B and -C antennas and the Radarsat spacecraft. The motivation for the C-SIDE configuration is to show that integration of active figure control in the radar's system-level design can relieve antenna mechanical design constraints. This presentation is primarily an introduction to the C-SIDE testbed. Its physical and functional layouts, and major components are described. The sensor is of special interest as it enables direct surface figure measurements from a remote location. The Remote Attitude Measurement System (RAMS) makes high-rate, unobtrusive measurements of many locations, several of which may be collocated easily with actuators. The control processor is a 386/25 executing a reduced order model-based algorithm with provision for residual mode filters to compensate for structure interaction. The actuators for the ground demonstration are non-contacting, linear force devices. Results presented illustrate some basic characteristics of control-structure interaction with this hardware. The testbed will be used for evaluation of current technologies and for research in several areas. A brief indication of the evolution of the C-SIDE is given at the conclusion
An Inflationary Fixed Point Operator in XQuery
We introduce a controlled form of recursion in XQuery, inflationary fixed
points, familiar in the context of relational databases. This imposes
restrictions on the expressible types of recursion, but we show that
inflationary fixed points nevertheless are sufficiently versatile to capture a
wide range of interesting use cases, including the semantics of Regular XPath
and its core transitive closure construct.
While the optimization of general user-defined recursive functions in XQuery
appears elusive, we will describe how inflationary fixed points can be
efficiently evaluated, provided that the recursive XQuery expressions exhibit a
distributivity property. We show how distributivity can be assessed both,
syntactically and algebraically, and provide experimental evidence that XQuery
processors can substantially benefit during inflationary fixed point
evaluation.Comment: 11 pages, 10 figures, 2 table
Efficiently and Transparently Maintaining High SIMD Occupancy in the Presence of Wavefront Irregularity
Demand is increasing for high throughput processing of irregular streaming applications; examples of such applications from scientific and engineering domains include biological sequence alignment, network packet filtering, automated face detection, and big graph algorithms. With wide SIMD, lightweight threads, and low-cost thread-context switching, wide-SIMD architectures such as GPUs allow considerable flexibility in the way application work is assigned to threads. However, irregular applications are challenging to map efficiently onto wide SIMD because data-dependent filtering or replication of items creates an unpredictable data wavefront of items ready for further processing. Straightforward implementations of irregular applications on a wide-SIMD architecture are prone to load imbalance and reduced occupancy, while more sophisticated implementations require advanced use of parallel GPU operations to redistribute work efficiently among threads.
This dissertation will present strategies for addressing the performance challenges of wavefront- irregular applications on wide-SIMD architectures. These strategies are embodied in a developer framework called Mercator that (1) allows developers to map irregular applications onto GPUs ac- cording to the streaming paradigm while abstracting from low-level data movement and (2) includes generalized techniques for transparently overcoming the obstacles to high throughput presented by wavefront-irregular applications on a GPU. Mercator forms the centerpiece of this dissertation, and we present its motivation, performance model, implementation, and extensions in this work
Optimization of Regular Path Queries in Graph Databases
Regular path queries offer a powerful navigational mechanism in graph databases. Recently, there has been renewed interest in such queries in the context of the Semantic Web. The extension of SPARQL in version 1.1 with property paths offers a type of regular path query for RDF graph databases. While eminently useful, such queries are difficult to optimize and evaluate efficiently, however. We design and implement a cost-based optimizer we call Waveguide for SPARQL queries with property paths. Waveguide builds a query planwhich we call a waveplan (WP)which guides the query evaluation. There are numerous choices in the con- struction of a plan, and a number of optimization methods, so the space of plans for a query can be quite large. Execution costs of plans for the same query can vary by orders of magnitude with the best plan often offering excellent performance. A WPs costs can be estimated, which opens the way to cost-based optimization. We demonstrate that Waveguide properly subsumes existing techniques and that the new plans it adds are relevant. We analyze the effective plan space which is enabled by Waveguide and design an efficient enumerator for it. We implement a pro- totype of a Waveguide cost-based optimizer on top of an open-source relational RDF store. Finally, we perform a comprehensive performance study of the state of the art for evaluation of SPARQL property paths and demonstrate the significant performance gains that Waveguide offers
Middle-out reasoning for synthesis and induction
We develop two applications of middle-out reasoning in inductive proofs: Logic program synthesis and the selection of induction schemes. Middle-out reasoning as part of proof planning was first suggested by Bundy et al [Bundy et al 90a]. Middle-out reasoning uses variables to represent unknown terms and formulae. Unification instantiates the variables in the subsequent planning, while proof planning provides the necessary search control. Middle-out reasoning is used for synthesis by planning the verification of an unknown logic program: The program body is represented with a meta-variable. The planning results both in an instantiation of the program body and a plan for the verification of that program. If the plan executes successfully, the synthesized program is partially correct and complete. Middle-out reasoning is also used to select induction schemes. Finding an appropriate induction scheme during synthesis is difficult, because the recursion of the program, which is un..
Volumetric Procedural Models for Shape Representation
This article describes a volumetric approach for procedural shape modeling
and a new Procedural Shape Modeling Language (PSML) that facilitates the
specification of these models. PSML provides programmers the ability to
describe shapes in terms of their 3D elements where each element may be a
semantic group of 3D objects, e.g., a brick wall, or an indivisible object,
e.g., an individual brick. Modeling shapes in this manner facilitates the
creation of models that more closely approximate the organization and structure
of their real-world counterparts. As such, users may query these models for
volumetric information such as the number, position, orientation and volume of
3D elements which cannot be provided using surface based model-building
techniques. PSML also provides a number of new language-specific capabilities
that allow for a rich variety of context-sensitive behaviors and
post-processing functions. These capabilities include an object-oriented
approach for model design, methods for querying the model for component-based
information and the ability to access model elements and components to perform
Boolean operations on the model parts. PSML is open-source and includes freely
available tutorial videos, demonstration code and an integrated development
environment to support writing PSML programs
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