Planning automated guided vehicle movements in a factory

This dissertation examines the problems of planning automated guided vehicle (AGV) movement schedules in an automated factory. AGVs are used mainly for material delivery and will have an important role in linking "islands of automation" in automated factories. Their employment in this context requires the plans to be generated in a manner which supports temporal projection so that further planning in other areas is possible. Planning also occurs in a dynamic scenario—while some plans are being executed, planning for new tasks and replanning failing plans occur. Expeditious planning is thus important so that deadlines can be met. Furthermore, dynamic replanning in a multi-agent environment has repercussions—changing one plan may require revision of other plans. Hence the issue of limiting the side effects of dynamic replanning is also considered. In dealing with these issues, the goals of this research are: (1) generate movement plans which can be executed efficiently; (2) develop fast algorithms for the recurrent subproblems viz. task assignment and route planning; and (3) generate robust plans which tolerate execution deviations; this helps to minimize disruptive dynamic replanning with its tendency to initiate a chain reaction of plan revisions. Efficient movement plans mean more productive utilization of the AGV fleet and this objective can be realized by three approaches. First, the tasks are assigned to AGVs optimally using an improved implementation of the Hungarian method. Second, the planner computes shortest routes for the AGVs using a bidirectional heuristic search algorithm which is amenable to parallel implementation for further computational time reduction. Third, whenever AGVs are fortuitously predisposed to assist each other in task execution, the planner will generate gainful collaborative plans. Efficient algorithms have been developed in these areas. The algorithms for task assignment and route planning are also designed to be fast, in keeping with the objective of expeditious planning. Robust plans can be generated using the approach of tolerant planning. Robustness is achieved in two ways: (1) by being tolerant of an AGV's own execution deviations; and (2) by being tolerant of other AGVs' deviant behaviour. Tolerant planning thus defers dynamic replanning until execution errors become excessive. The underlying strategy is to provide more than ample resources (time) for AGVs to achieve various subgoals. Such redundancies aggravate the resource contention problem. To solve this, an iterative negotiation model is proposed. During negotiations, AGVs yield in turn to help eliminate the conflict. The negotiation behaviour of each is governed by how much spare resources each has and tends towards intransigence as the bottom line is approached. In this way, no AGV will jeopardize its own plan while cooperating in the elimination of conflicts. By gradual yielding, an AGV is also able to influence the other party to yield more if it can, therein achieving some fairness. The model has many of the characteristics of negotiation acts in the real world (e.g. skilful negotiation, intransigence, selfishness, willingness to concede, nested negotiations)

Parallel and Distributed Computing

The 14 chapters presented in this book cover a wide variety of representative works ranging from hardware design to application development. Particularly, the topics that are addressed are programmable and reconfigurable devices and systems, dependability of GPUs (General Purpose Units), network topologies, cache coherence protocols, resource allocation, scheduling algorithms, peertopeer networks, largescale network simulation, and parallel routines and algorithms. In this way, the articles included in this book constitute an excellent reference for engineers and researchers who have particular interests in each of these topics in parallel and distributed computing

Telecommunications Networks

This book guides readers through the basics of rapidly emerging networks to more advanced concepts and future expectations of Telecommunications Networks. It identifies and examines the most pressing research issues in Telecommunications and it contains chapters written by leading researchers, academics and industry professionals. Telecommunications Networks - Current Status and Future Trends covers surveys of recent publications that investigate key areas of interest such as: IMS, eTOM, 3G/4G, optimization problems, modeling, simulation, quality of service, etc. This book, that is suitable for both PhD and master students, is organized into six sections: New Generation Networks, Quality of Services, Sensor Networks, Telecommunications, Traffic Engineering and Routing

Advances and Technologies in High Voltage Power Systems Operation, Control, Protection and Security

The electrical demands in several countries around the world are increasing due to the huge energy requirements of prosperous economies and the human activities of modern life. In order to economically transfer electrical powers from the generation side to the demand side, these powers need to be transferred at high-voltage levels through suitable transmission systems and power substations. To this end, high-voltage transmission systems and power substations are in demand. Actually, they are at the heart of interconnected power systems, in which any faults might lead to unsuitable consequences, abnormal operation situations, security issues, and even power cuts and blackouts. In order to cope with the ever-increasing operation and control complexity and security in interconnected high-voltage power systems, new architectures, concepts, algorithms, and procedures are essential. This book aims to encourage researchers to address the technical issues and research gaps in high-voltage transmission systems and power substations in modern energy systems

Data systems concepts for space systems, phase 1

Deviations from the traditional spacecraft data systems were studied. A data system architecture was developed from the top down

Advanced Technique and Future Perspective for Next Generation Optical Fiber Communications

Optical fiber communication industry has gained unprecedented opportunities and achieved rapid progress in recent years. However, with the increase of data transmission volume and the enhancement of transmission demand, the optical communication field still needs to be upgraded to better meet the challenges in the future development. Artificial intelligence technology in optical communication and optical network is still in its infancy, but the existing achievements show great application potential. In the future, with the further development of artificial intelligence technology, AI algorithms combining channel characteristics and physical properties will shine in optical communication. This reprint introduces some recent advances in optical fiber communication and optical network, and provides alternative directions for the development of the next generation optical fiber communication technology

Network-on-Chip

Limitations of bus-based interconnections related to scalability, latency, bandwidth, and power consumption for supporting the related huge number of on-chip resources result in a communication bottleneck. These challenges can be efficiently addressed with the implementation of a network-on-chip (NoC) system. This book gives a detailed analysis of various on-chip communication architectures and covers different areas of NoCs such as potentials, architecture, technical challenges, optimization, design explorations, and research directions. In addition, it discusses current and future trends that could make an impactful and meaningful contribution to the research and design of on-chip communications and NoC systems

Packet scheduling algorithms for a software-defined manufacturing environment

With the vision of Industry 4.0, Internet of things (IoT) and Internet of Services (IoS) are making their way to the modern manufacturing systems and industrial automation. As a consequence, modern day manufacturing systems need wider product variation and customization to meet the customer's demands and survive in the competitive markets. Traditional, dedicated systems like assembly lines cannot adapt the rapidly changing requirement of today's manufacturing industries. A flexible and highly scalable infrastructure is needed to support such systems. However, most of the applications in manufacturing systems require strict QoS guarantees. For instance, time-sensitive networks like in industrial automation and smart factories need hard real-time guarantees. Deterministic networks with bounded delay and jitter are essential requirement for such systems. To support such systems, non-deterministic queueing delay has to be eliminated from the network. To this end, we present Time-Sensitive Software-Defined Networks (TSSDN) with a logically centralized controller which computes transmission schedules based on the global view of the network. SDN control logic computes optimized transmission schedules for the end hosts to avoid in network queueing delay. To compute transmission schedules, we present Integer Linear Programming and Routing and Scheduling Algorithms with heuristics that schedule and route unicast and multicast flows. Our evaluations show that it is possible to compute near optimal transmission schedules for TSSDN and bound network delays and jitter

The 1992 4th NASA SERC Symposium on VLSI Design

Papers from the fourth annual NASA Symposium on VLSI Design, co-sponsored by the IEEE, are presented. Each year this symposium is organized by the NASA Space Engineering Research Center (SERC) at the University of Idaho and is held in conjunction with a quarterly meeting of the NASA Data System Technology Working Group (DSTWG). One task of the DSTWG is to develop new electronic technologies that will meet next generation electronic data system needs. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The NASA SERC is proud to offer, at its fourth symposium on VLSI design, presentations by an outstanding set of individuals from national laboratories, the electronics industry, and universities. These speakers share insights into next generation advances that will serve as a basis for future VLSI design

Interactive global illumination on the CPU

Computing realistic physically-based global illumination in real-time remains one of the major goals in the fields of rendering and visualisation; one that has not yet been achieved due to its inherent computational complexity. This thesis focuses on CPU-based interactive global illumination approaches with an aim to develop generalisable hardware-agnostic algorithms. Interactive ray tracing is reliant on spatial and cache coherency to achieve interactive rates which conflicts with needs of global illumination solutions which require a large number of incoherent secondary rays to be computed. Methods that reduce the total number of rays that need to be processed, such as Selective rendering, were investigated to determine how best they can be utilised. The impact that selective rendering has on interactive ray tracing was analysed and quantified and two novel global illumination algorithms were developed, with the structured methodology used presented as a framework. Adaptive Inter- leaved Sampling, is a generalisable approach that combines interleaved sampling with an adaptive approach, which uses efficient component-specific adaptive guidance methods to drive the computation. Results of up to 11 frames per second were demonstrated for multiple components including participating media. Temporal Instant Caching, is a caching scheme for accelerating the computation of diffuse interreflections to interactive rates. This approach achieved frame rates exceeding 9 frames per second for the majority of scenes. Validation of the results for both approaches showed little perceptual difference when comparing against a gold-standard path-traced image. Further research into caching led to the development of a new wait-free data access control mechanism for sharing the irradiance cache among multiple rendering threads on a shared memory parallel system. By not serialising accesses to the shared data structure the irradiance values were shared among all the threads without any overhead or contention, when reading and writing simultaneously. This new approach achieved efficiencies between 77% and 92% for 8 threads when calculating static images and animations. This work demonstrates that, due to the flexibility of the CPU, CPU-based algorithms remain a valid and competitive choice for achieving global illumination interactively, and an alternative to the generally brute-force GPU-centric algorithms