A domain specific language for performance evaluation of medical imaging systems

We propose iDSL, a domain specific language and toolbox for performance evaluation of Medical Imaging Systems. iDSL provides transformations to MoDeST models, which are in turn converted into UPPAAL and discrete-event MODES models. This enables automated performance evaluation by means of model checking and simulations. iDSL presents its results visually. We have tested iDSL on two example image processing systems. iDSL has successfully returned differentiated delays, resource utilizations and delay bounds. Hence, iDSL helps in evaluating and choosing between design alternatives, such as the effects of merging subsystems onto one platform or moving functionality from one platform to another

Exploring resource/performance trade-offs for streaming applications on embedded multiprocessors

Embedded system design is challenged by the gap between the ever-increasing customer demands and the limited resource budgets. The tough competition demands ever-shortening time-to-market and product lifecycles. To solve or, at least to alleviate, the aforementioned issues, designers and manufacturers need model-based quantitative analysis techniques for early design-space exploration to study trade-offs of different implementation candidates. Moreover, modern embedded applications, especially the streaming applications addressed in this thesis, face more and more dynamic input contents, and the platforms that they are running on are more flexible and allow runtime configuration. Quantitative analysis techniques for embedded system design have to be able to handle such dynamic adaptable systems. This thesis has the following contributions: - A resource-aware extension to the Synchronous Dataflow (SDF) model of computation. - Trade-off analysis techniques, both in the time-domain and in the iterationdomain (i.e., on an SDF iteration basis), with support for resource sharing. - Bottleneck-driven design-space exploration techniques for resource-aware SDF. - A game-theoretic approach to controller synthesis, guaranteeing performance under dynamic input. As a first contribution, we propose a new model, as an extension of static synchronous dataflow graphs (SDF) that allows the explicit modeling of resources with consistency checking. The model is called resource-aware SDF (RASDF). The extension enables us to investigate resource sharing and to explore different scheduling options (ways to allocate the resources to the different tasks) using state-space exploration techniques. Consistent SDF and RASDF graphs have the property that an execution occurs in so-called iterations. An iteration typically corresponds to the processing of a meaningful piece of data, and it returns the graph to its initial state. On multiprocessor platforms, iterations may be executed in a pipelined fashion, which makes performance analysis challenging. As the second contribution, this thesis develops trade-off analysis techniques for RASDF, both in the time-domain and in the iteration-domain (i.e., on an SDF iteration basis), to dimension resources on platforms. The time-domain analysis allows interleaving of different iterations, but the size of the explored state space grows quickly. The iteration-based technique trades the potential of interleaving of iterations for a compact size of the iteration state space. An efficient bottleneck-driven designspace exploration technique for streaming applications, the third main contribution in this thesis, is derived from analysis of the critical cycle of the state space, to reveal bottleneck resources that are limiting the throughput. All techniques are based on state-based exploration. They enable system designers to tailor their platform to the required applications, based on their own specific performance requirements. Pruning techniques for efficient exploration of the state space have been developed. Pareto dominance in terms of performance and resource usage is used for exact pruning, and approximation techniques are used for heuristic pruning. Finally, the thesis investigates dynamic scheduling techniques to respond to dynamic changes in input streams. The fourth contribution in this thesis is a game-theoretic approach to tackle controller synthesis to select the appropriate schedules in response to dynamic inputs from the environment. The approach transforms the explored iteration state space of a scenario- and resource-aware SDF (SARA SDF) graph to a bipartite game graph, and maps the controller synthesis problem to the problem of finding a winning positional strategy in a classical mean payoff game. A winning strategy of the game can be used to synthesize the controller of schedules for the system that is guaranteed to satisfy the throughput requirement given by the designer

Sémantique compositionnelle et raffinement de systèmes temporisés : application aux automates temporisés d'UPPAAL et au langage FIACRE

Les systèmes temps-réel sont massivement impliqués dans de nombreuses applications, dont notre vie dépend comme les logiciels embarqués dans les voitures et les avions. Pour ces systèmes des erreurs inattendues ne sont pas acceptables. De ce fait, assurer la correction de ces systèmes est une tâche primordiale. Les systèmes temps-réel représentent un large spectre de systèmes automatisés dont la correction dépend de la ponctualité des événements (timeliness) et pas seulement de leurs propriétés fonctionnelles. Chaque événement doit être produit selon la date indiquée par la spécification du système. Les systèmes temps-réel sont concurrents et embarqués, et conçus comme un assemblage de composants en interaction. Malgré les progrès réalisés dans les techniques de model checking, la vérification et l'analyse des systèmes temps-réel représentent toujours un défi autant pour les chercheurs que les praticiens. Pour étudier le comportement des systèmes temps-réel, différents formalismes ont été considérés comme les automates temporisés, les réseaux de Petri temporisés et les algèbres de processus. Cela donne lieu à plusieurs points délicats concernant le raffinement, la composition et la vérification. Ces points représentent un champ de recherche intensif. Ma thèse présente une étude des systèmes temps-réel focalisée sur les notions de sémantique, de composition et de raffinement. Elle décrit nos efforts pour explorer et étendre les formalismes temps-réel. Nous avons abordé les concepts de base de la modélisation des systèmes temps réel tels que les variables partagées, la communication, les priorités, la dynamicité, etc. La contribution de cette thèse porte sur la définition d’un cadre formel pour raisonner sur la sémantique, la composition et le raffinement des systèmes temporisés. Nous avons instancié ce cadre pour le formalisme des automates temporisés et le langage Fiacre.Nowadays, real-time systems are intensively involved in many applications on which our life is dependent, like embedded software in cars and planes. For these systems unexpected errors are not acceptable. Real-time systems represent a large spectrum of automated systems of which correctness depends on the timing of events (timeliness) and not only on their functional properties. Each event must be produced on time. Realtime systems can be concurrent and embedded where different interactive modules and components are assembled together. Despite advances in model checking techniques, the verification and analysis of real-time systems still represent a strong challenge for researchers and practitioners. To study the behavior of real-time systems, different formalisms have been considered like timed automata, time Petri nets and timed algebra, and several challenges concerning refinement, composition and verification have emerged. These points represent an intensive field of research. This thesis describes our effort to explore and extend real-time formalisms. We have revisited real-time language semantics, focusing on composition and refinement. We have addressed high level concepts like shared variables, communication, priorities, dynamicity, etc. The main contribution consists of a theoretical study of timed systems where we establish a framework for reasoning on composition, refinement and semantics. We instantiate this framework for timed automata and the Fiacre language

Ninth Workshop and Tutorial on Practical Use of Coloured Petri Nets and the CPN Tools, Aarhus, Denmark, October 20-22, 2008

This booklet contains the proceedings of the Ninth Workshop on Practical Use of Coloured Petri Nets and the CPN Tools, October 20-22, 2008. The workshop is organised by the CPN group at the Department of Computer Science, University of Aarhus, Denmark. The papers are also available in electronic form via the web pages: http://www.daimi.au.dk/CPnets/workshop0

Verification of Printer Datapaths Using Timed Automata

Contains fulltext : 83697.pdf (preprint version ) (Closed access

Second Annual Workshop on Space Operations Automation and Robotics (SOAR 1988)

Papers presented at the Second Annual Workshop on Space Operation Automation and Robotics (SOAR '88), hosted by Wright State University at Dayton, Ohio, on July 20, 21, 22, and 23, 1988, are documented herein. During the 4 days, approximately 100 technical papers were presented by experts from NASA, the USAF, universities, and technical companies. Panel discussions on Human Factors, Artificial Intelligence, Robotics, and Space Systems were held but are not documented herein. Technical topics addressed included knowledge-based systems, human factors, and robotics