3,197 research outputs found
GRL: A Specification Language for Globally Asynchronous Locally Synchronous Systems
International audienceA GALS (Globally Asynchronous, Locally Synchronous) system consists of several synchronous subsystems that evolve concurrently and interact with each other asynchronously. Most formalisms and design tools support either the synchronous paradigm or the asynchronous paradigm but rarely combine both, which requires an intricate modeling of GALS systems. In this paper, we present a new language, called GRL (GALS Representation Language) designed to model GALS systems in an abstract and versatile manner for the purpose of formal verification. GRL has formal semantics combining the synchronous reactive model underlying dataflow languages and the asynchronous concurrent model underlying process algebras. We present the basic concepts and the main constructs of the language, together with an illustrative example
A project to investigate mechanisms and methodologies for the design and construction of communicating concurrent processes in real-time environments
Research undertaken in 1979 into effective and appropriate mechanisms to aid in the design and construction of software for use in the flight research programs undertaken by NASA is presented
Validation and verification of the interconnection of hardware intellectual property blocks for FPGA-based packet processing systems
As networks become more versatile, the computational requirement for supporting additional
functionality increases. The increasing demands of these networks can be met by Field Programmable
Gate Arrays (FPGA), which are an increasingly popular technology for implementing packet processing
systems. The fine-grained parallelism and density of these devices can be exploited to meet the
computational requirements and implement complex systems on a single chip. However, the increasing
complexity of FPGA-based systems makes them susceptible to errors and difficult to test and debug.
To tackle the complexity of modern designs, system-level languages have been developed to provide
abstractions suited to the domain of the target system. Unfortunately, the lack of formality in
these languages can give rise to errors that are not caught until late in the design cycle. This
thesis presents three techniques for verifying and validating FPGA-based packet processing systems
described in a system-level description language. First, a type system is applied to the system
description language to detect errors before implementation. Second, system-level transaction
monitoring is used to observe high-level events on-chip following implementation. Third, the
high-level information embodied in the system description language is exploited to allow the system
to be automatically instrumented for on-chip monitoring.
This thesis demonstrates that these techniques catch errors which are undetected by traditional
verification and validation tools. The locations of faults are specified and errors are caught
earlier in the design flow, which saves time by reducing synthesis iterations
A theory of delay-insensitive systems
xiii+134hlm.;24c
AnonySense: A System for Anonymous Opportunistic Sensing
We describe AnonySense, a privacy-aware system for realizing pervasive applications based on collaborative, opportunistic sensing by personal mobile devices. AnonySense allows applications to submit sensing \emphtasks\/ to be distributed across participating mobile devices, later receiving verified, yet anonymized, sensor data \emphreports\/ back from the field, thus providing the first secure implementation of this participatory sensing model. We describe our security goals, threat model, and the architecture and protocols of AnonySense. We also describe how AnonySense can support extended security features that can be useful for different applications. We evaluate the security and feasibility of AnonySense through security analysis and prototype implementation. We show the feasibility of our approach through two plausible applications: a Wi-Fi rogue access point detector and a lost-object finder
- …