121 research outputs found
A Network Coding Approach to Loss Tomography
Network tomography aims at inferring internal network characteristics based
on measurements at the edge of the network. In loss tomography, in particular,
the characteristic of interest is the loss rate of individual links and
multicast and/or unicast end-to-end probes are typically used. Independently,
recent advances in network coding have shown that there are advantages from
allowing intermediate nodes to process and combine, in addition to just
forward, packets. In this paper, we study the problem of loss tomography in
networks with network coding capabilities. We design a framework for estimating
link loss rates, which leverages network coding capabilities, and we show that
it improves several aspects of tomography including the identifiability of
links, the trade-off between estimation accuracy and bandwidth efficiency, and
the complexity of probe path selection. We discuss the cases of inferring link
loss rates in a tree topology and in a general topology. In the latter case,
the benefits of our approach are even more pronounced compared to standard
techniques, but we also face novel challenges, such as dealing with cycles and
multiple paths between sources and receivers. Overall, this work makes the
connection between active network tomography and network coding
Center for Aeronautics and Space Information Sciences
This report summarizes the research done during 1991/92 under the Center for Aeronautics and Space Information Science (CASIS) program. The topics covered are computer architecture, networking, and neural nets
Architectural Support for Efficient Communication in Future Microprocessors
Traditionally, the microprocessor design has focused on the computational aspects
of the problem at hand. However, as the number of components on a single chip
continues to increase, the design of communication architecture has become a crucial
and dominating factor in defining performance models of the overall system. On-chip
networks, also known as Networks-on-Chip (NoC), emerged recently as a promising
architecture to coordinate chip-wide communication.
Although there are numerous interconnection network studies in an inter-chip
environment, an intra-chip network design poses a number of substantial challenges
to this well-established interconnection network field. This research investigates designs
and applications of on-chip interconnection network in next-generation microprocessors
for optimizing performance, power consumption, and area cost. First,
we present domain-specific NoC designs targeted to large-scale and wire-delay dominated
L2 cache systems. The domain-specifically designed interconnect shows 38%
performance improvement and uses only 12% of the mesh-based interconnect. Then,
we present a methodology of communication characterization in parallel programs
and application of characterization results to long-channel reconfiguration. Reconfigured
long channels suited to communication patterns enhance the latency of the
mesh network by 16% and 14% in 16-core and 64-core systems, respectively. Finally,
we discuss an adaptive data compression technique that builds a network-wide frequent value pattern map and reduces the packet size. In two examined multi-core
systems, cache traffic has 69% compressibility and shows high value sharing among
flows. Compression-enabled NoC improves the latency by up to 63% and saves energy
consumption by up to 12%
IP and ATM integration: A New paradigm in multi-service internetworking
ATM is a widespread technology adopted by many to support advanced data communication, in particular efficient Internet services provision. The expected challenges of multimedia communication together with the increasing massive utilization of IP-based applications urgently require redesign of networking solutions in terms of both new functionalities and enhanced performance. However, the networking context is affected by so many changes, and to some extent chaotic growth, that any approach based on a structured and complex top-down architecture is unlikely to be applicable. Instead, an approach based on finding out the best match between realistic service requirements and the pragmatic, intelligent use of technical opportunities made available by the product market seems more appropriate. By following this approach, innovations and improvements can be introduced at different times, not necessarily complying with each other according to a coherent overall design. With the aim of pursuing feasible innovations in the different networking aspects, we look at both IP and ATM internetworking in order to investigating a few of the most crucial topics/ issues related to the IP and ATM integration perspective. This research would also address various means of internetworking the Internet Protocol (IP) and Asynchronous Transfer Mode (ATM) with an objective of identifying the best possible means of delivering Quality of Service (QoS) requirements for multi-service applications, exploiting the meritorious features that IP and ATM have to offer. Although IP and ATM often have been viewed as competitors, their complementary strengths and limitations from a natural alliance that combines the best aspects of both the technologies. For instance, one limitation of ATM networks has been the relatively large gap between the speed of the network paths and the control operations needed to configure those data paths to meet changing user needs. IP\u27s greatest strength, on the other hand, is the inherent flexibility and its capacity to adapt rapidly to changing conditions. These complementary strengths and limitations make it natural to combine IP with ATM to obtain the best that each has to offer. Over time many models and architectures have evolved for IP/ATM internetworking and they have impacted the fundamental thinking in internetworking IP and ATM. These technologies, architectures, models and implementations will be reviewed in greater detail in addressing possible issues in integrating these architectures s in a multi-service, enterprise network. The objective being to make recommendations as to the best means of interworking the two in exploiting the salient features of one another to provide a faster, reliable, scalable, robust, QoS aware network in the most economical manner. How IP will be carried over ATM when a commercial worldwide ATM network is deployed is not addressed and the details of such a network still remain in a state of flux to specify anything concrete. Our research findings culminated with a strong recommendation that the best model to adopt, in light of the impending integrated service requirements of future multi-service environments, is an ATM core with IP at the edges to realize the best of both technologies in delivering QoS guarantees in a seamless manner to any node in the enterprise
Towards the Digital Twin (DT) of narrow-band Internet of Things (NBIoT) wireless communication in industrial indoor environment
A study of the behavior of NB-IoT wireless communication in an industrial indoor environment was conducted in this paper. With Wireless Insite software, a scenario in the industrial sector was simulated and modeled. Our research examined how this scenario or environment affected the communication parameters of NB-IoT’s physical layer. In this context, throughput levels among terminals as well as between terminals and transceiver towers, the power received at signal destination points, signal-to-noise ratios (SNRs) in the environment, and distances between terminals and transceivers are considered. These simulated results are also compared with the calculated or theoretical values of these parameters. The results show the effect of the industrial setting on wireless communication. The differences between the theoretical and simulated values are also established
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