Rateless Coding for Gaussian Channels

A rateless code-i.e., a rate-compatible family of codes-has the property that codewords of the higher rate codes are prefixes of those of the lower rate ones. A perfect family of such codes is one in which each of the codes in the family is capacity-achieving. We show by construction that perfect rateless codes with low-complexity decoding algorithms exist for additive white Gaussian noise channels. Our construction involves the use of layered encoding and successive decoding, together with repetition using time-varying layer weights. As an illustration of our framework, we design a practical three-rate code family. We further construct rich sets of near-perfect rateless codes within our architecture that require either significantly fewer layers or lower complexity than their perfect counterparts. Variations of the basic construction are also developed, including one for time-varying channels in which there is no a priori stochastic model.Comment: 18 page

A STUDY OF LINEAR ERROR CORRECTING CODES

Since Shannon's ground-breaking work in 1948, there have been two main development streams of channel coding in approaching the limit of communication channels, namely classical coding theory which aims at designing codes with large minimum Hamming distance and probabilistic coding which places the emphasis on low complexity probabilistic decoding using long codes built from simple constituent codes. This work presents some further investigations in these two channel coding development streams. Low-density parity-check (LDPC) codes form a class of capacity-approaching codes with sparse parity-check matrix and low-complexity decoder Two novel methods of constructing algebraic binary LDPC codes are presented. These methods are based on the theory of cyclotomic cosets, idempotents and Mattson-Solomon polynomials, and are complementary to each other. The two methods generate in addition to some new cyclic iteratively decodable codes, the well-known Euclidean and projective geometry codes. Their extension to non binary fields is shown to be straightforward. These algebraic cyclic LDPC codes, for short block lengths, converge considerably well under iterative decoding. It is also shown that for some of these codes, maximum likelihood performance may be achieved by a modified belief propagation decoder which uses a different subset of 7^ codewords of the dual code for each iteration. Following a property of the revolving-door combination generator, multi-threaded minimum Hamming distance computation algorithms are developed. Using these algorithms, the previously unknown, minimum Hamming distance of the quadratic residue code for prime 199 has been evaluated. In addition, the highest minimum Hamming distance attainable by all binary cyclic codes of odd lengths from 129 to 189 has been determined, and as many as 901 new binary linear codes which have higher minimum Hamming distance than the previously considered best known linear code have been found. It is shown that by exploiting the structure of circulant matrices, the number of codewords required, to compute the minimum Hamming distance and the number of codewords of a given Hamming weight of binary double-circulant codes based on primes, may be reduced. A means of independently verifying the exhaustively computed number of codewords of a given Hamming weight of these double-circulant codes is developed and in coiyunction with this, it is proved that some published results are incorrect and the correct weight spectra are presented. Moreover, it is shown that it is possible to estimate the minimum Hamming distance of this family of prime-based double-circulant codes. It is shown that linear codes may be efficiently decoded using the incremental correlation Dorsch algorithm. By extending this algorithm, a list decoder is derived and a novel, CRC-less error detection mechanism that offers much better throughput and performance than the conventional ORG scheme is described. Using the same method it is shown that the performance of conventional CRC scheme may be considerably enhanced. Error detection is an integral part of an incremental redundancy communications system and it is shown that sequences of good error correction codes, suitable for use in incremental redundancy communications systems may be obtained using the Constructions X and XX. Examples are given and their performances presented in comparison to conventional CRC schemes

Hybrid ARQ with parallel and serial concatenated convolutional codes for next generation wireless communications

This research focuses on evaluating the currently used FEC encoding-decoding schemes and improving the performance of error control systems by incorporating these schemes in a hybrid FEC-ARQ environment. Beginning with an overview of wireless communications and the various ARQ protocols, the thesis provides an in-depth explanation of convolutional encoding and Viterbi decoding, turbo (PCCC) and serial concatenated convolutional (SCCC) encoding with their respective MAP decoding strategies.;A type-II hybrid ARQ scheme with SCCCs is proposed for the first time and is a major contribution of this thesis. A vast improvement is seen in the BER performance of the successive individual FEC schemes discussed above. Also, very high throughputs can be achieved when these schemes are incorporated in an adaptive type-II hybrid ARQ system.;Finally, the thesis discusses the equivalence of the PCCCs and the SCCCs and proposes a technique to generate a hybrid code using both schemes

Fifty Years of Noise Modeling and Mitigation in Power-Line Communications.

Building on the ubiquity of electric power infrastructure, power line communications (PLC) has been successfully used in diverse application scenarios, including the smart grid and in-home broadband communications systems as well as industrial and home automation. However, the power line channel exhibits deleterious properties, one of which is its hostile noise environment. This article aims for providing a review of noise modeling and mitigation techniques in PLC. Specifically, a comprehensive review of representative noise models developed over the past fifty years is presented, including both the empirical models based on measurement campaigns and simplified mathematical models. Following this, we provide an extensive survey of the suite of noise mitigation schemes, categorizing them into mitigation at the transmitter as well as parametric and non-parametric techniques employed at the receiver. Furthermore, since the accuracy of channel estimation in PLC is affected by noise, we review the literature of joint noise mitigation and channel estimation solutions. Finally, a number of directions are outlined for future research on both noise modeling and mitigation in PLC

Near-capacity fixed-rate and rateless channel code constructions

Fixed-rate and rateless channel code constructions are designed for satisfying conflicting design tradeoffs, leading to codes that benefit from practical implementations, whilst offering a good bit error ratio (BER) and block error ratio (BLER) performance. More explicitly, two novel low-density parity-check code (LDPC) constructions are proposed; the first construction constitutes a family of quasi-cyclic protograph LDPC codes, which has a Vandermonde-like parity-check matrix (PCM). The second construction constitutes a specific class of protograph LDPC codes, which are termed as multilevel structured (MLS) LDPC codes. These codes possess a PCM construction that allows the coexistence of both pseudo-randomness as well as a structure requiring a reduced memory. More importantly, it is also demonstrated that these benefits accrue without any compromise in the attainable BER/BLER performance. We also present the novel concept of separating multiple users by means of user-specific channel codes, which is referred to as channel code division multiple access (CCDMA), and provide an example based on MLS LDPC codes. In particular, we circumvent the difficulty of having potentially high memory requirements, while ensuring that each user’s bits in the CCDMA system are equally protected. With regards to rateless channel coding, we propose a novel family of codes, which we refer to as reconfigurable rateless codes, that are capable of not only varying their code-rate but also to adaptively modify their encoding/decoding strategy according to the near-instantaneous channel conditions. We demonstrate that the proposed reconfigurable rateless codes are capable of shaping their own degree distribution according to the nearinstantaneous requirements imposed by the channel, but without any explicit channel knowledge at the transmitter. Additionally, a generalised transmit preprocessing aided closed-loop downlink multiple-input multiple-output (MIMO) system is presented, in which both the channel coding components as well as the linear transmit precoder exploit the knowledge of the channel state information (CSI). More explicitly, we embed a rateless code in a MIMO transmit preprocessing scheme, in order to attain near-capacity performance across a wide range of channel signal-to-ratios (SNRs), rather than only at a specific SNR. The performance of our scheme is further enhanced with the aid of a technique, referred to as pilot symbol assisted rateless (PSAR) coding, whereby a predetermined fraction of pilot bits is appropriately interspersed with the original information bits at the channel coding stage, instead of multiplexing pilots at the modulation stage, as in classic pilot symbol assisted modulation (PSAM). We subsequently demonstrate that the PSAR code-aided transmit preprocessing scheme succeeds in gleaning more information from the inserted pilots than the classic PSAM technique, because the pilot bits are not only useful for sounding the channel at the receiver but also beneficial for significantly reducing the computational complexity of the rateless channel decoder

Error-correction coding for high-density magnetic recording channels.

Finally, a promising algorithm which combines RS decoding algorithm with LDPC decoding algorithm together is investigated, and a reduced-complexity modification has been proposed, which not only improves the decoding performance largely, but also guarantees a good performance in high signal-to-noise ratio (SNR), in which area an error floor is experienced by LDPC codes.The soft-decision RS decoding algorithms and their performance on magnetic recording channels have been researched, and the algorithm implementation and hardware architecture issues have been discussed. Several novel variations of KV algorithm such as soft Chase algorithm, re-encoded Chase algorithm and forward recursive algorithm have been proposed. And the performance of nested codes using RS and LDPC codes as component codes have been investigated for bursty noise magnetic recording channels.Future high density magnetic recoding channels (MRCs) are subject to more noise contamination and intersymbol interference, which make the error-correction codes (ECCs) become more important. Recent research of replacement of current Reed-Solomon (RS)-coded ECC systems with low-density parity-check (LDPC)-coded ECC systems obtains a lot of research attention due to the large decoding gain for LDPC-coded systems with random noise. In this dissertation, systems aim to maintain the RS-coded system using recent proposed soft-decision RS decoding techniques are investigated and the improved performance is presented

Error-Correction Coding and Decoding: Bounds, Codes, Decoders, Analysis and Applications

Coding; Communications; Engineering; Networks; Information Theory; Algorithm

Factor Graph Based Detection Schemes for Mobile Terrestrial DVB Systems with Long OFDM Blocks

This PhD dissertation analyzes the performance of second generation digital video broadcasting (DVB) systems in mobile terrestrial environments and proposes an iterative detection algorithm based on factor graphs (FG) to reduce the distortion caused by the time variation of the channel, providing error-free communication in very severe mobile conditions. The research work focuses on mobile scenarios where the intercarrier interference (ICI) is very high: high vehicular speeds when long orthogonal frequency-division multiplexing (OFDM) blocks are used. As a starting point, we provide the theoretical background on the main topics behind the transmission and reception of terrestrial digital television signals in mobile environments, along with a general overview of the main signal processing techniques included in last generation terrestrial DVB systems. The proposed FG-based detector design is then assessed over a simpli ed bit-interleaved coded modulation (BICM)-OFDM communication scheme for a wide variety of mobile environments. Extensive simulation results show the e ectiveness of the proposed belief propagation (BP) algorithm over the channels of interest in this research work. Moreover, assuming that low density parity-check (LDPC) codes are decoded by means of FG-based algorithms, a high-order FG is de ned in order to accomplish joint signal detection and decoding into the same FG framework, o ering a fully parallel structure very suitable when long OFDM blocks are employed. Finally, the proposed algorithms are analyzed over the physical layer of DVB-T2 speci cation. Two reception schemes are proposed which exploit the frequency and time-diversity inherent in time-varying channels with the aim of achieving a reasonable trade-o among performance, complexity and latency.Doktoretza tesi honek bigarren belaunaldiko telebista digitalaren eraginkortasuna aztertzen du eskenatoki mugikorrean, eta faktoreen grafoetan oinarritzen den hartzaile iteratibo bat proposatzen du denboran aldakorra den kanalak sortzen duen distortsioa leundu eta seinalea errorerik gabe hartzea ahalbidetzen duena. Proposatutako detektorea BICM-OFDM komunikazio eskema orokor baten gainean ebaluatu da lurreko broadcasting kanalaren baldintzak kontutan hartuz. Simulazio emaitzek algoritmo honen eraginkortasuna frogatzen dute Doppler frekuentzia handietan. Ikerketa lanaren bigarren zatian, faktoreen grafoetan oinarritutako detektorea eskema turbo zabalago baten baitan txertatu da LDPC dekodi katzaile batekin batera. Hartzaile diseinu honen abantaila nagusia da OFDM simbolo luzeetara ondo egokitzen dela. Azkenik, proposatutako algoritmoa DVB-T2 katearen baitan inplementatu da, bi hartzaile eskema proposatu direlarik seinaleak duen dibertsitate tenporal eta frekuentziala probesteko, beti ere eraginkortasunaren, konplexutasunaren eta latentziaren arteko konpromisoa mantenduz.Este trabajo de tesis analiza el rendimiento de la segunda generación de la televisión digital terreste en escenarios móviles y propone un algoritmo iterativo basado en grafos de factores para la detección de la señal y la reducción de la distorsión causada por la variación temporal del canal, permitiendo así recibir la señal libre de errores. El detector basado en grafos de factores propuesto es evaluado sobre un esquema de comunicaciones general BICM-OFDM en condiciones de transmisión propios de canales de difusión terrestres. Los resultados de simulación presentados muestran la e ciencia del algoritmo de detección propuesto en presencia de frecuencias Doppler muy altas. En una segunda parte del trabajo de investigación, el detector propuesto es incorporado a un esquema turbo junto con un decodi cador LDPC, dando lugar a un receptor iterativo que presenta características especialmente apropiadas para su implementación en sistemas OFDM con longitudes de símbolo elevadas. Por último, se analiza la implementación del algoritmo propuesto sobre la cadena de recepción de DVB-T2. Se presentan dos esquemas de recepción que explotan la diversidad temporal y frecuencial presentes en la señal afectada por canales variantes en el tiempo, consiguiendo un compromiso razonable entre rendimiento, complejidad y latencia