Parallelization of Plasma Physics Simulations on Massively Parallel Architectures

Proyecto de Graduación (Maestría en Ingeniería en Computación) Instituto Tecnológico de Costa Rica, Escuela de Ingeniería en Computación, 2017.Clean energy sources have increased its importance in the last few years. Because of that, the seek for more sustainable sources has been increased too. This effect made to turn the eyes of the scientific community into plasma physics, specially to the controlled fusion. This plasma physics developments have to rely on computer simulation processes before start the implementation of the respective fusion devices. The simulation process has to be done in order to detect any kind of issues on the theoretical model of the device, saving time and money. To achieve this, those computer simulation processes have to finish in a timely manner. If not, the simulation defeats its purpose. However, in recent years, computer systems have passed from an increment speed approach to a increment parallelism approach. That change represents a short stop for these applications. Because of these reasons, on this dissertation we took one plasma physics application for simulation and sped it up by implementing vectorization, shared, and distributed memory programming in a hybrid model. We ran several experiments regarding the performance improvement and the scaling of the new implementation of the application on sumpercomputers using a recent architecture, Intel Xeon Phi - Knights Landing - manycore processor. The claim of this thesis is that a plasma physics application can be parallelized achieving around 0.8 of performance under the right configuration and the right architecture

Exploring coordinated software and hardware support for hardware resource allocation

Multithreaded processors are now common in the industry as they offer high performance at a low cost. Traditionally, in such processors, the assignation of hardware resources between the multiple threads is done implicitly, by the hardware policies. However, a new class of multithreaded hardware allows the explicit allocation of resources to be controlled or biased by the software. Currently, there is little or no coordination between the allocation of resources done by the hardware and the prioritization of tasks done by the software.This thesis targets to narrow the gap between the software and the hardware, with respect to the hardware resource allocation, by proposing a new explicit resource allocation hardware mechanism and novel schedulers that use the currently available hardware resource allocation mechanisms.It approaches the problem in two different types of computing systems: on the high performance computing domain, we characterize the first processor to present a mechanism that allows the software to bias the allocation hardware resources, the IBM POWER5. In addition, we propose the use of hardware resource allocation as a way to balance high performance computing applications. Finally, we propose two new scheduling mechanisms that are able to transparently and successfully balance applications in real systems using the hardware resource allocation. On the soft real-time domain, we propose a hardware extension to the existing explicit resource allocation hardware and, in addition, two software schedulers that use the explicit allocation hardware to improve the schedulability of tasks in a soft real-time system.In this thesis, we demonstrate that system performance improves by making the software aware of the mechanisms to control the amount of resources given to each running thread. In particular, for the high performance computing domain, we show that it is possible to decrease the execution time of MPI applications biasing the hardware resource assignation between threads. In addition, we show that it is possible to decrease the number of missed deadlines when scheduling tasks in a soft real-time SMT system

Parallel and Distributed Computing

The 14 chapters presented in this book cover a wide variety of representative works ranging from hardware design to application development. Particularly, the topics that are addressed are programmable and reconfigurable devices and systems, dependability of GPUs (General Purpose Units), network topologies, cache coherence protocols, resource allocation, scheduling algorithms, peertopeer networks, largescale network simulation, and parallel routines and algorithms. In this way, the articles included in this book constitute an excellent reference for engineers and researchers who have particular interests in each of these topics in parallel and distributed computing