A new Li-ion battery charger with charge mode selection based on 0.18 um CMOS for phone applications

A new architecture of Li-Ion battery charger with charge mode selection is presented in this work. To ensure high efficiency, good accuracy and complete protection mode, we propose an architecture based on variable current source, temperature detector and power control. To avoid the risk of damage, the Li- Ion batteries charging process must change between three modes of current (trickle current (TC), constant current (CC), and constant voltage (CV)) in order to charge the battery with degrading current. However, the interest of this study is to develop a fast battery charger with high accuracy that is able to switch between charging modes without reducing its power efficiency, and to guarantee a complete protection mode. The proposed charger circuit is designed to control the charging process in three modes using the charging mode selection. The obtained results show that the Li-ion batteries can be successfully charged in a short time without reducing their efficiency. The proposed charger is implemented in 180 nm CMOS technology with a maximum charging current equal to 1 A and a maximum battery voltage equal to 4.22 V, (with input range 2.7-4.5 V). The chip area is 1.5 mm2 and the power efficiency is 90.09 %

A new high speed charge and high efficiency Li-Ion battery charger interface using pulse control technique

A new Li-Ion battery charger interface (BCI) using pulse control (PC) technique is designed and analyzed in this paper. Thanks to the use of PC technique, the main standards of the Li-Ion battery charger, i.e. fast charge, small surface area and high efficiency, are achieved. The proposed charger achieves full charge in forty-one minutes passing by the constant current (CC) charging mode which also included the start-up and the constant voltage mode (CV) charging mode. It designed, simulated and layouted which occupies a small size area 0.1 mm2 by using Taiwan Semiconductor Manufacturing Company 180 nm complementary metal oxide semi-conductor technology (TSMC 180 nm CMOS) technology in Cadence Virtuoso software. The battery voltage VBAT varies between 2.9 V to 4.35 V and the maximum battery current IBAT is 2.1 A in CC charging mode, according to a maximum input voltage VIN equal 5 V. The maximum charging efficiency reaches 98%

High Performance Power Management Integrated Circuits for Portable Devices

abstract: Portable devices often require multiple power management IC (PMIC) to power different sub-modules, Li-ion batteries are well suited for portable devices because of its small size, high energy density and long life cycle. Since Li-ion battery is the major power source for portable device, fast and high-efficiency battery charging solution has become a major requirement in portable device application. In the first part of dissertation, a high performance Li-ion switching battery charger is proposed. Cascaded two loop (CTL) control architecture is used for seamless CC-CV transition, time based technique is utilized to minimize controller area and power consumption. Time domain controller is implemented by using voltage controlled oscillator (VCO) and voltage controlled delay line (VCDL). Several efficiency improvement techniques such as segmented power-FET, quasi-zero voltage switching (QZVS) and switching frequency reduction are proposed. The proposed switching battery charger is able to provide maximum 2 A charging current and has an peak efficiency of 93.3%. By configure the charger as boost converter, the charger is able to provide maximum 1.5 A charging current while achieving 96.3% peak efficiency. The second part of dissertation presents a digital low dropout regulator (DLDO) for system on a chip (SoC) in portable devices application. The proposed DLDO achieve fast transient settling time, lower undershoot/overshoot and higher PSR performance compared to state of the art. By having a good PSR performance, the proposed DLDO is able to power mixed signal load. To achieve a fast load transient response, a load transient detector (LTD) enables boost mode operation of the digital PI controller. The boost mode operation achieves sub microsecond settling time, and reduces the settling time by 50% to 250 ns, undershoot/overshoot by 35% to 250 mV and 17% to 125 mV without compromising the system stability.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

High-current integrated battery chargers for mobile applications

Battery charging circuits for mobile applications, such as smart phones and tablets, require both small area and low losses. In addition, to reduce the charging time, high current is needed through the converter. In this work, exploration of the Buck, the 3-Level Buck and the Hybrid Buck converter is performed over the input voltage, the total FET area and the load current. An analytical loss model for each topology is constructed and constrated by experimental results. In addition, packaging and bond wire impact on on-chip losses is analyzed by 3D modeling. Finally, a comparison between the topologies is presented determining potential candidates for a maximum on-chip loss of 2 W at output voltage of 4 V and 10 A of output current

Low Power Circuit Design in Sustainable Self Powered Systems for IoT Applications

The Internet-of-Things (IoT) network is being vigorously pushed forward from many fronts in diverse research communities. Many problems are still there to be solved, and challenges are found among its many levels of abstraction. In this thesis we give an overview of recent developments in circuit design for ultra-low power transceivers and energy harvesting management units for the IoT. The first part of the dissertation conducts a study of energy harvesting interfaces and optimizing power extraction, followed by power management for energy storage and supply regulation. we give an overview of the recent developments in circuit design for ultra-low power management units, focusing mainly in the architectures and techniques required for energy harvesting from multiple heterogeneous sources. Three projects are presented in this area to reach a solution that provides reliable continuous operation for IoT sensor nodes in the presence of one or more natural energy sources to harvest from. The second part focuses on wireless transmission, To reduce the power consumption and boost the Tx energy efficiency, a novel delay cell exploiting current reuse is used in a ring-oscillator employed as the local oscillator generator scheme. In combination with an edge-combiner power amplifier, the Tx showed a measured energy efficiency of 0.2 nJ=bit and a normalized energy efficiency of 3.1 nJ=bit:mW when operating at output power levels up to -10 dBm and data rates of 3 Mbps

Design of Power Management Integrated Circuits and High-Performance ADCs

A battery-powered system has widely expanded its applications to implantable medical devices (IMDs) and portable electronic devices. Since portable devices or IMDs operate in the energy-constrained environment, their low-power operations in combination with efficiently sourcing energy to them are key problems to extend device life. This research proposes novel circuit techniques for two essential functions of a power receiving unit (PRU) in the energy-constrained environment, which are power management and signal processing. The first part of this dissertation discusses power management integrated circuits for a PRU. From a power management perspective, the most critical two circuit blocks are a front-end rectifier and a battery charger. The front-end CMOS active rectifier converts transmitted AC power into DC power. High power conversion efficiency (PCE) is required to reduce power loss during the power transfer, and high voltage conversion ratio (VCR) is required for the rectifier to enable low-voltage operations. The proposed 13.56-MHz CMOS active rectifier presents low-power circuit techniques for comparators and controllers to reduce increasing power loss of an active diode with offset/delay calibration. It is implemented with 5-V devices of a 0.35 µm CMOS process to support high voltage. A peak PCE of 89.0%, a peak VCR of 90.1%, and a maximum output power of 126.7 mW are measured for 200Ω loading. The linear battery charger stores the converted DC power into a battery. Since even small power saving can be enough to run the low-power PRU, a battery charger with low IvQ is desirable. The presented battery charger is based on a single amplifier for regulation and the charging phase transition from the constant-current (CC) phase to the constant-voltage (CV) phase. The proposed unified amplifier is based on stacked differential pairs which share the bias current. Its current-steering property removes multiple amplifiers for regulation and the CC-CV transition, and achieves high unity-gain loop bandwidth for fast regulation. The charger with the maximum charging current of 25 mA is implemented in 0.35 µm CMOS. A peak charger efficiency of 94% and average charger efficiency of 88% are achieved with an 80-mAh Li-ion polymer battery. The second part of this dissertation focuses on analog-to-digital converters (ADCs). From a signal processing perspective, an ADC is one of the most important circuit blocks in the PRU. Hence, an energy-efficient ADC is essential in the energy-constrained environment. A pipelined successive approximation register (SAR) ADC has good energy efficiency in a design space of moderate-to-high speeds and resolutions. Process-Voltage-Temperature variations of a dynamic amplifier in the pipelined-SAR ADC is a key design issue. This research presents two dynamic amplifier architectures for temperature compensation. One is based on a voltage-to-time converter (VTC) and a time-to-voltage converter (TVC), and the other is based on a temperature-dependent common-mode detector. The former amplifier is adopted in a 13-bit 10-50 MS/s subranging pipelined-SAR ADC fabricated in 0.13-µm CMOS. The ADC can operate under the power supply voltage of 0.8-1.2 V. Figure-of-Merits (FoMs) of 4-11.3 fJ/conversion-step are achieved. The latter amplifier is also implemented in 0.13-µm CMOS, consuming 0.11 mW at 50 MS/s. Its measured gain variation is 2.1% across the temperature range of -20°C to 85 °C

Recent Development of Hybrid Renewable Energy Systems

Abstract: The use of renewable energies continues to increase. However, the energy obtained from renewable resources is variable over time. The amount of energy produced from the renewable energy sources (RES) over time depends on the meteorological conditions of the region chosen, the season, the relief, etc. So, variable power and nonguaranteed energy produced by renewable sources implies intermittence of the grid. The key lies in supply sources integrated to a hybrid system (HS)

Development of optically interrogated diagnostic systems within materials ageing experiments

This research project aimed to develop diagnostic options for in situ use within future materials ageing experiments in complex engineering environments. The techniques developed were required to be suitable for multi-decade deployment and have minimal impact upon the experimental chemical ageing evolution. Optical fibre based diagnostic options for measuring temperature, barometric pressure, and gaseous concentrations were reviewed. The long-term suitability of fibre Bragg grating (FBG) temperature sensors, fibre Fabry-Pérot (FFP) pressure sensors, O2sensing fluorescence probes, and optical fibre switches were assessed experimentally in experiments that lasted up to 1 year. A bespoke fibre-coupled multi-pass spectroscopic gas cell was developed for the detection of H2O with a path-length of (6.47±0.05)m, along with novel techniques to package FBG and FFP sensors, hermetically pass optical fibres into the experimental volume, and route optical fibres. Custom optical fibre connectors for use both inside and outside the experiment were designed and evaluated. To support the diagnostics investigated, a bespoke interrogation system was created, with a design focus on modularity, redundancy, and long-term support. The research was evaluated against the project requirements, and together formed a potential concept for future materials ageing experiments requiring comprehensive and enhanced embedded diagnostic capabilities. The developed technologies were assessed as ranging in technology readiness level (TRL) from 2 to 6. For use in an experiment, further work would be required to mature the techniques up to TRL 9, and potential maturation routes are presented.Engineering and Physical Sciences Research Council (EPSRC) Grant number EP/L01596X/1