70,294 research outputs found
Clafer: Lightweight Modeling of Structure, Behaviour, and Variability
Embedded software is growing fast in size and complexity, leading to intimate
mixture of complex architectures and complex control. Consequently, software
specification requires modeling both structures and behaviour of systems.
Unfortunately, existing languages do not integrate these aspects well, usually
prioritizing one of them. It is common to develop a separate language for each
of these facets. In this paper, we contribute Clafer: a small language that
attempts to tackle this challenge. It combines rich structural modeling with
state of the art behavioural formalisms. We are not aware of any other modeling
language that seamlessly combines these facets common to system and software
modeling. We show how Clafer, in a single unified syntax and semantics, allows
capturing feature models (variability), component models, discrete control
models (automata) and variability encompassing all these aspects. The language
is built on top of first order logic with quantifiers over basic entities (for
modeling structures) combined with linear temporal logic (for modeling
behaviour). On top of this semantic foundation we build a simple but expressive
syntax, enriched with carefully selected syntactic expansions that cover
hierarchical modeling, associations, automata, scenarios, and Dwyer's property
patterns. We evaluate Clafer using a power window case study, and comparing it
against other notations that substantially overlap with its scope (SysML, AADL,
Temporal OCL and Live Sequence Charts), discussing benefits and perils of using
a single notation for the purpose
Realizing live sequence charts in SystemVerilog.
The design of an embedded control system starts with an investigation of properties and behaviors of the process evolving within its environment, and an analysis of the requirement for its safety performance. In early stages, system requirements are often specified as scenarios of behavior using sequence charts for different use cases. This specification must be precise, intuitive and expressive enough to capture different aspects of embedded control systems. As a rather rich and useful extension to the classical message sequence charts, live sequence charts (LSC), which provide a rich collection of constructs for specifying both possible and mandatory behaviors, are very suitable for designing an embedded control system. However, it is not a trivial task to realize a high-level design model in executable program codes effectively and correctly. This paper tackles the challenging task by providing a mapping algorithm to automatically synthesize SystemVerilog programs from given LSC specifications
The Oracle Problem When Testing from MSCs
Message Sequence Charts (MSCs) form a popular language in which scenario-based specifications and models can be written. There has been significant interest in automating aspects of testing from MSCs. This paper concerns the Oracle Problem, in which we have an observation made in testing and wish to know whether this is consistent with the specification. We assume that there is an MSC specification and consider the case where we have entirely independent local testers (local observability) and where the observations of the local testers are logged and brought together (tester observability). It transpires that under local observability the Oracle Problem can be solved in low-order polynomial time if we use sequencing, loops and choices but becomes NP-complete if we also allow parallel components; if we place a bound on the number of parallel components then it again can be solved in polynomial time. For tester observability, the problem is NP-complete when we have either loops or choices. However, it can be solved in low-order polynomial time if we have only one loop, no choices, and no parallel components. If we allow parallel components then the Oracle Problem is NP-complete for tester observability even if we restrict to the case where there are at most two processes
Synthesizing Finite-state Protocols from Scenarios and Requirements
Scenarios, or Message Sequence Charts, offer an intuitive way of describing
the desired behaviors of a distributed protocol. In this paper we propose a new
way of specifying finite-state protocols using scenarios: we show that it is
possible to automatically derive a distributed implementation from a set of
scenarios augmented with a set of safety and liveness requirements, provided
the given scenarios adequately \emph{cover} all the states of the desired
implementation. We first derive incomplete state machines from the given
scenarios, and then synthesis corresponds to completing the transition relation
of individual processes so that the global product meets the specified
requirements. This completion problem, in general, has the same complexity,
PSPACE, as the verification problem, but unlike the verification problem, is
NP-complete for a constant number of processes. We present two algorithms for
solving the completion problem, one based on a heuristic search in the space of
possible completions and one based on OBDD-based symbolic fixpoint computation.
We evaluate the proposed methodology for protocol specification and the
effectiveness of the synthesis algorithms using the classical alternating-bit
protocol.Comment: This is the working draft of a paper currently in submission.
(February 10, 2014
Functional Skills Support Programme: Developing functional skills in history
This booklet is part of "... a series of 11 booklets which helps schools to implement functional skills across the curriculum. The booklets illustrate how functional skills can be applied and developed in different subjects and contexts, supporting achievement at Key Stage 3 and Key Stage 4.
Each booklet contains an introduction to functional skills for subject teachers, three practical planning examples with links to related websites and resources, a process for planning and a list of additional resources to support the teaching and learning of functional skills." - The National Strategies website
Hard or soft: Planning on medium size construction projects
Some data suggest that the approach to planning in construction seeks to impose a managed future on construction work by providing plans which are strictly time scheduled and produced by initially identifying those activities which are critical to the plan and allowing other activities to “fit in” to this critical path. This is referred to in the paper as “hard” planning. The paper seeks to demonstrate that the reality for some managers and planners is that the planning process is “soft” and that in producing plans they seek initially to take account of the vast uncertainties of construction by removing criticality from all activities. The paper is based on data obtained from longitudinal case study research of four live, medium size, projects in the North East of England. The data analysis uses the Grounded Theory approach
Matrix management for aerospace 2000
The martix management approach to program management is an organized effort for attaining program objectives by defining and structuring all elements so as to form a single system whose parts are united by interaction. The objective of the systems approach is uncompromisingly complete coverage of the program management endeavor. Starting with an analysis of the functions necessary to carry out a given program, a model must be defined; a matrix of responsibility assignment must be prepared; and each operational process must be examined to establish how it is to be carried out and how it relates to all other processes
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