62 research outputs found

    Radiation Performance of 1 Gbit DDR SDRAMs Fabricated in the 90 nm CMOS Technology Node

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    We present Single Event Effect (SEE) and Total Ionizing Dose (TID) data for 1 Gbit DDR SDRAMs (90 nm CMOS technology) as well as comparing this data with earlier technology nodes from the same manufacturer

    Radiation Tolerant Intelligent Memory Stack (RTIMS)

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    The Radiation Tolerant Intelligent Memory Stack (RTIMS), suitable for both geostationary and low earth orbit missions, has been developed. The memory module is fully functional and undergoing environmental and radiation characterization. A self-contained flight-like module is expected to be completed in 2006. RTIMS provides reconfigurable circuitry and 2 gigabits of error corrected or 1 gigabit of triple redundant digital memory in a small package. RTIMS utilizes circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuitries are stacked into a module of 42.7mm x 42.7mm x 13.00mm. Triple module redundancy, current limiting, configuration scrubbing, and single event function interrupt detection are employed to mitigate radiation effects. The mitigation techniques significantly simplify system design. RTIMS is well suited for deployment in real-time data processing, reconfigurable computing, and memory intensive applications

    Use of Commercial FPGA-Based Evaluation Boards for Single-Event Testing of DDR2 and DDR3 SDRAMs

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    We investigate the use of commercial FPGA based evaluation boards for radiation testing DDR2 and DDR3 SDRAMs. We evaluate the resulting data quality and the tradeoffs involved in the use of these boards

    Flash-memories in Space Applications: Trends and Challenges

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    Nowadays space applications are provided with a processing power absolutely overcoming the one available just a few years ago. Typical mission-critical space system applications include also the issue of solid-state recorder(s). Flash-memories are nonvolatile, shock-resistant and power-economic, but in turn have different drawbacks. A solid-state recorder for space applications should satisfy many different constraints especially because of the issues related to radiations: proper countermeasures are needed, together with EDAC and testing techniques in order to improve the dependability of the whole system. Different and quite often contrasting dimensions need to be explored during the design of a flash-memory based solid- state recorder. In particular, we shall explore the most important flash-memory design dimensions and trade-offs to tackle during the design of flash-based hard disks for space application

    An Experimental Analysis of RowHammer in HBM2 DRAM Chips

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    RowHammer (RH) is a significant and worsening security, safety, and reliability issue of modern DRAM chips that can be exploited to break memory isolation. Therefore, it is important to understand real DRAM chips' RH characteristics. Unfortunately, no prior work extensively studies the RH vulnerability of modern 3D-stacked high-bandwidth memory (HBM) chips, which are commonly used in modern GPUs. In this work, we experimentally characterize the RH vulnerability of a real HBM2 DRAM chip. We show that 1) different 3D-stacked channels of HBM2 memory exhibit significantly different levels of RH vulnerability (up to 79% difference in bit error rate), 2) the DRAM rows at the end of a DRAM bank (rows with the highest addresses) exhibit significantly fewer RH bitflips than other rows, and 3) a modern HBM2 DRAM chip implements undisclosed RH defenses that are triggered by periodic refresh operations. We describe the implications of our observations on future RH attacks and defenses and discuss future work for understanding RH in 3D-stacked memories.Comment: To appear at DSN Disrupt 202

    Radiation Test Results on COTS and non-COTS Electronic Devices for NASA-JSC Space Flight Projects

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    This presentation reports the results of recent proton and heavy ion Single Event Effect (SEE) testing on a variety of COTS and non-COTs electronic devices and assemblies tested for the Space Shuttle, International Space Station (ISS) and Multi-Purpose Crew Vehicle (MPCV)

    Radiation Induced Variable Retention Time in Dynamic Random Access Memories

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    The effect of gamma-ray and neutron radiations on the Variable Retention Time (VRT) phenomenon occurring in Dynamic Random Access Memory (DRAM) is studied. It is shown that both ionizing radiation and non-ionizing radiation induce VRT behaviors in DRAM cells. It demonstrates that both Si/SiO2 interface states and silicon bulk defects can be a source of VRT. It is also highlighted that radiation induced VRT in DRAMs is very similar to radiation induced Dark Current Random Telegraph Signal (DC-RTS) in image sensors. Both phenomena probably share the same origin but high magnitude electric fields seem to play an important role in VRT only. Defect structural fluctuations (without change of charge state) seem to be the root cause of the observed VRT whereas processes involving trapping and emission of charge carriers are unlikely to be a source of VRT. VRT also appears to be the most probable cause of intermittent stuck bits in irradiated DRAMs

    An SDRAM test education package that embeds the factory equipment into the e-learning server

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    SDRAM (Synchronous Dynamic Random Access Memory) demand has grown exponentially since the 1980s, as a result of technological factors and new areas of application, particularly concerning communication and consumer electronics. The SDRAM market represented in 2007 c. 20% of the total semiconductor business and is seen as a strategic area, justifying private and public investment in the western and far-eastern economic communities. SDRAM test education is therefore an important subject, but very high purchase and maintenance costs keep test equipment beyond reach of most university test courses. This paper presents a pilot project addressing an SDRAM test education course developed jointly by Qimonda and the University of Porto (FEUP), where the company offers remote access to one if its Advantest SDRAM automatic test equipments. Access to this remote tester was embedded into the Moodle e-learning server that supports a new course entitled Electronic Systems Testing (TSEL), which is part of the Integrated Masters degree on Electrical and Computer Engineering at FEUP. The excellent feedback received from students encouraged us to extend this cooperation into an educational network, which is also introduced in this paper

    Design and development of a reduced form-factor high accuracy three-axis teslameter

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    Acknowledgments: The authors would like to thank Reuben Debono for his useful guidance and help in the PCB assembly of the instruments at the Electronic Systems Lab at the Faculty of Engineering at University of Malta. The authors would like to thank R. Ganter, project leader of the Athos undulator beamline and H-H. Braun, SwissFEL machine director, for their constant support throughout the entire project. The authors would like to thank Sasa Spasic and his team at Sentronis facilities for their fruitful discussions and their guidance during testing.A novel three-axis teslameter and other similar machines have been designed and developed for SwissFEL at the Paul Scherrer Institute (PSI). The developed instrument will be used for high fidelity characterisation and optimisation of the undulators for the ATHOS soft X-ray beamline. The teslameter incorporates analogue signal conditioning for the three-axes interface to a SENIS Hall probe, an interface to a Heidenhain linear absolute encoder and an on-board high-resolution 24-bit analogue-to-digital conversion. This is in contrast to the old instrumentation setup used, which only comprises the analogue circuitry with digitization being done externally to the instrument. The new instrument fits in a volumetric space of 150 mm × 50 mm × 45 mm, being very compact in size and also compatible with the in-vacuum undulators. This paper describes the design and the development of the different components of the teslameter. Performance results are presented that demonstrate offset fluctuation and drift (0.1–10 Hz) with a standard deviation of 0.78 µT and a broadband noise (10–500 Hz) of 2.05 µT with an acquisition frequency of 2 kHz.peer-reviewe
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