17,268 research outputs found
Dependable Digitally-Assisted Mixed-Signal IPs Based on Integrated Self-Test & Self-Calibration
Heterogeneous SoC devices, including sensors, analogue and mixed-signal front-end circuits and the availability of massive digital processing capability, are being increasingly used in safety-critical applications like in the automotive, medical, and the security arena. Already a significant amount of attention has been paid in literature with respect to the dependability of the digital parts in heterogeneous SoCs. This is in contrast to especially the sensors and front-end mixed-signal electronics; these are however particular sensitive to external influences over time and hence determining their dependability. This paper provides an integrated SoC/IP approach to enhance the dependability. It will give an example of a digitally-assisted mixed-signal front-end IP which is being evaluated under its mission profile of an automotive tyre pressure monitoring system. It will be shown how internal monitoring and digitally-controlled adaptation by using embedded processors can help in terms of improving the dependability of this mixed-signal part under harsh conditions for a long time
Ultra-Thin Chip Package (UTCP) and stretchable circuit technologies for wearable ECG system
A comfortable, wearable wireless ECG monitoring system is proposed. The device is realized using the combination of two proprietary advanced technologies for electronic packaging and interconnection : the UTCP (Ultra-Thin Chip Package) technology and the SMI (Stretchable Mould Interconnect) technology for elastic and stretchable circuits. Introduction of these technologies results in small fully functional devices, exhibiting a significant increase in user comfort compared to devices fabricated with more conventional packaging and interconnection technologies
A review of advances in pixel detectors for experiments with high rate and radiation
The Large Hadron Collider (LHC) experiments ATLAS and CMS have established
hybrid pixel detectors as the instrument of choice for particle tracking and
vertexing in high rate and radiation environments, as they operate close to the
LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for
which the tracking detectors will be completely replaced, new generations of
pixel detectors are being devised. They have to address enormous challenges in
terms of data throughput and radiation levels, ionizing and non-ionizing, that
harm the sensing and readout parts of pixel detectors alike. Advances in
microelectronics and microprocessing technologies now enable large scale
detector designs with unprecedented performance in measurement precision (space
and time), radiation hard sensors and readout chips, hybridization techniques,
lightweight supports, and fully monolithic approaches to meet these challenges.
This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog.
Phy
Single Event Effects in CMOS Image Sensors
In this work, 3T Active Pixel Sensors (APS) are exposed to heavy ions (N, Ar, Kr, Xe), and Single Event Effects (SEE) are studied. Devices were fully functional during exposure, no Single Event Latch-up (SEL) or Single Event Functional Interrupt (SEFI) happened. However Single Event Transient (SET) effects happened on frames: line disturbances, and half or full circular clusters of white pixels. The collection of charges in cluster was investigated with arrays of two pixel width (7 and 10 \textmu{}m), with bulk and epitaxial substrates. This paper shows technological and design parameters involved in the transient events. It also shows that STARDUST simulation software can predict cluster obtained for bulk substrate devices. However, the discrepancies in epitaxial layer devices are large - which shows the need for an improved model
Neuro-inspired system for real-time vision sensor tilt correction
Neuromorphic engineering tries to mimic biological
information processing. Address-Event-Representation (AER)
is an asynchronous protocol for transferring the information of
spiking neuro-inspired systems. Currently AER systems are able
sense visual and auditory stimulus, to process information, to
learn, to control robots, etc. In this paper we present an AER
based layer able to correct in real time the tilt of an AER vision
sensor, using a high speed algorithmic mapping layer. A codesign
platform (the AER-Robot platform), with a Xilinx
Spartan 3 FPGA and an 8051 USB microcontroller, has been
used to implement the system. Testing it with the help of the
USBAERmini2 board and the jAER software.Junta de AndalucĂa P06-TIC-01417Ministerio de EducaciĂłn y Ciencia TEC2006-11730-C03-02Ministerio de Ciencia e InnovaciĂłn TEC2009-10639-C04-0
Configurable 3D-integrated focal-plane sensor-processor array architecture
A mixed-signal Cellular Visual Microprocessor architecture with digital processors is
described. An ASIC implementation is also demonstrated. The architecture is composed of a
regular sensor readout circuit array, prepared for 3D face-to-face type integration, and one or
several cascaded array of mainly identical (SIMD) processing elements. The individual array
elements derived from the same general HDL description and could be of different in size, aspect
ratio, and computing resources
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