32,796 research outputs found
Compositional Algorithms for Succinct Safety Games
We study the synthesis of circuits for succinct safety specifications given
in the AIG format. We show how AIG safety specifications can be decomposed
automatically into sub specifications. Then we propose symbolic compositional
algorithms to solve the synthesis problem compositionally starting for the
sub-specifications. We have evaluated the compositional algorithms on a set of
benchmarks including those proposed for the first synthesis competition
organised in 2014 by the Synthesis Workshop affiliated to the CAV conference.
We show that a large number of benchmarks can be decomposed automatically and
solved more efficiently with the compositional algorithms that we propose in
this paper.Comment: In Proceedings SYNT 2015, arXiv:1602.0078
Reasoning about transfinite sequences
We introduce a family of temporal logics to specify the behavior of systems
with Zeno behaviors. We extend linear-time temporal logic LTL to authorize
models admitting Zeno sequences of actions and quantitative temporal operators
indexed by ordinals replace the standard next-time and until future-time
operators. Our aim is to control such systems by designing controllers that
safely work on -sequences but interact synchronously with the system in
order to restrict their behaviors. We show that the satisfiability problem for
the logics working on -sequences is EXPSPACE-complete when the
integers are represented in binary, and PSPACE-complete with a unary
representation. To do so, we substantially extend standard results about LTL by
introducing a new class of succinct ordinal automata that can encode the
interaction between the different quantitative temporal operators.Comment: 38 page
Model-checking Quantitative Alternating-time Temporal Logic on One-counter Game Models
We consider quantitative extensions of the alternating-time temporal logics
ATL/ATLs called quantitative alternating-time temporal logics (QATL/QATLs) in
which the value of a counter can be compared to constants using equality,
inequality and modulo constraints. We interpret these logics in one-counter
game models which are infinite duration games played on finite control graphs
where each transition can increase or decrease the value of an unbounded
counter. That is, the state-space of these games are, generally, infinite. We
consider the model-checking problem of the logics QATL and QATLs on one-counter
game models with VASS semantics for which we develop algorithms and provide
matching lower bounds. Our algorithms are based on reductions of the
model-checking problems to model-checking games. This approach makes it quite
simple for us to deal with extensions of the logical languages as well as the
infinite state spaces. The framework generalizes on one hand qualitative
problems such as ATL/ATLs model-checking of finite-state systems,
model-checking of the branching-time temporal logics CTL and CTLs on
one-counter processes and the realizability problem of LTL specifications. On
the other hand the model-checking problem for QATL/QATLs generalizes
quantitative problems such as the fixed-initial credit problem for energy games
(in the case of QATL) and energy parity games (in the case of QATLs). Our
results are positive as we show that the generalizations are not too costly
with respect to complexity. As a byproduct we obtain new results on the
complexity of model-checking CTLs in one-counter processes and show that
deciding the winner in one-counter games with LTL objectives is
2ExpSpace-complete.Comment: 22 pages, 12 figure
Advancing Dynamic Fault Tree Analysis
This paper presents a new state space generation approach for dynamic fault
trees (DFTs) together with a technique to synthesise failures rates in DFTs.
Our state space generation technique aggressively exploits the DFT structure
--- detecting symmetries, spurious non-determinism, and don't cares. Benchmarks
show a gain of more than two orders of magnitude in terms of state space
generation and analysis time. Our approach supports DFTs with symbolic failure
rates and is complemented by parameter synthesis. This enables determining the
maximal tolerable failure rate of a system component while ensuring that the
mean time of failure stays below a threshold
Wyner VAE: Joint and Conditional Generation with Succinct Common Representation Learning
A new variational autoencoder (VAE) model is proposed that learns a succinct
common representation of two correlated data variables for conditional and
joint generation tasks. The proposed Wyner VAE model is based on two
information theoretic problems---distributed simulation and channel
synthesis---in which Wyner's common information arises as the fundamental limit
of the succinctness of the common representation. The Wyner VAE decomposes a
pair of correlated data variables into their common representation (e.g., a
shared concept) and local representations that capture the remaining randomness
(e.g., texture and style) in respective data variables by imposing the mutual
information between the data variables and the common representation as a
regularization term. The utility of the proposed approach is demonstrated
through experiments for joint and conditional generation with and without style
control using synthetic data and real images. Experimental results show that
learning a succinct common representation achieves better generative
performance and that the proposed model outperforms existing VAE variants and
the variational information bottleneck method.Comment: 24 pages, 18 figure
Learning Concise Models from Long Execution Traces
Abstract models of system-level behaviour have applications in design
exploration, analysis, testing and verification. We describe a new algorithm
for automatically extracting useful models, as automata, from execution traces
of a HW/SW system driven by software exercising a use-case of interest. Our
algorithm leverages modern program synthesis techniques to generate predicates
on automaton edges, succinctly describing system behaviour. It employs trace
segmentation to tackle complexity for long traces. We learn concise models
capturing transaction-level, system-wide behaviour--experimentally
demonstrating the approach using traces from a variety of sources, including
the x86 QEMU virtual platform and the Real-Time Linux kernel
Finite-state Strategies in Delay Games (full version)
What is a finite-state strategy in a delay game? We answer this surprisingly
non-trivial question by presenting a very general framework that allows to
remove delay: finite-state strategies exist for all winning conditions where
the resulting delay-free game admits a finite-state strategy. The framework is
applicable to games whose winning condition is recognized by an automaton with
an acceptance condition that satisfies a certain aggregation property. Our
framework also yields upper bounds on the complexity of determining the winner
of such delay games and upper bounds on the necessary lookahead to win the
game. In particular, we cover all previous results of that kind as special
cases of our uniform approach
Reachability in Parametric Interval Markov Chains using Constraints
Parametric Interval Markov Chains (pIMCs) are a specification formalism that
extend Markov Chains (MCs) and Interval Markov Chains (IMCs) by taking into
account imprecision in the transition probability values: transitions in pIMCs
are labeled with parametric intervals of probabilities. In this work, we study
the difference between pIMCs and other Markov Chain abstractions models and
investigate the two usual semantics for IMCs: once-and-for-all and
at-every-step. In particular, we prove that both semantics agree on the
maximal/minimal reachability probabilities of a given IMC. We then investigate
solutions to several parameter synthesis problems in the context of pIMCs --
consistency, qualitative reachability and quantitative reachability -- that
rely on constraint encodings. Finally, we propose a prototype implementation of
our constraint encodings with promising results
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