Shortest Paths and Steiner Trees in VLSI Routing

Routing is one of the major steps in very-large-scale integration (VLSI) design. Its task is to find disjoint wire connections between sets of points on a chip, subject to numerous constraints. This problem is solved in a two-stage approach, which consists of so-called global and detailed routing steps. For each set of metal components to be connected, global routing reduces the search space by computing corridors in which detailed routing sequentially determines the desired connections as shortest paths. In this thesis, we present new theoretical results on Steiner trees and shortest paths, the two main mathematical concepts in routing. In the practical part, we give computational results of BonnRoute, a VLSI routing tool developed at the Research Institute for Discrete Mathematics at the University of Bonn. Interconnect signal delays are becoming increasingly important in modern chip designs. Therefore, the length of paths or direct delay measures should be taken into account when constructing rectilinear Steiner trees. We consider the problem of finding a rectilinear Steiner minimum tree (RSMT) that --- as a secondary objective --- minimizes a signal delay related objective. Given a source we derive some structural properties of RSMTs for which the weighted sum of path lengths from the source to the other terminals is minimized. Also, we present an exact algorithm for constructing RSMTs with weighted sum of path lengths as secondary objective, and a heuristic for various secondary objectives. Computational results for industrial designs are presented. We further consider the problem of finding a shortest rectilinear Steiner tree in the plane in the presence of rectilinear obstacles. The Steiner tree is allowed to run over obstacles; however, if it intersects an obstacle, then no connected component of the induced subtree must be longer than a given fixed length. This kind of length restriction is motivated by its application in VLSI routing where a large Steiner tree requires the insertion of repeaters which must not be placed on top of obstacles. We show that there are optimal length-restricted Steiner trees with a special structure. In particular, we prove that a certain graph (called augmented Hanan grid) always contains an optimal solution. Based on this structural result, we give an approximation scheme for the special case that all obstacles are of rectangular shape or are represented by at most a constant number of edges. Turning to the shortest paths problem, we present a new generic framework for Dijkstra's algorithm for finding shortest paths in digraphs with non-negative integral edge lengths. Instead of labeling individual vertices, we label subgraphs which partition the given graph. Much better running times can be achieved if the number of involved subgraphs is small compared to the order of the original graph and the shortest path problems restricted to these subgraphs is computationally easy. As an application we consider the VLSI routing problem, where we need to find millions of shortest paths in partial grid graphs with billions of vertices. Here, the algorithm can be applied twice, once in a coarse abstraction (where the labeled subgraphs are rectangles), and once in a detailed model (where the labeled subgraphs are intervals). Using the result of the first algorithm to speed up the second one via goal-oriented techniques leads to considerably reduced running time. We illustrate this with the routing program BonnRoute on leading-edge industrial chips. Finally, we present computational results of BonnRoute obtained on real-world VLSI chips. BonnRoute fulfills all requirements of modern VLSI routing and has been used by IBM and its customers over many years to produce more than one thousand different chips. To demonstrate the strength of BonnRoute as a state-of-the-art industrial routing tool, we show that it performs excellently on all traditional quality measures such as wire length and number of vias, but also on further criteria of equal importance in the every-day work of the designer

Using ant colony optimization for routing in microprocesors

Power consumption is an important constraint on VLSI systems. With the advancement in technology, it is now possible to pack a large range of functionalities into VLSI devices. Hence it is important to find out ways to utilize these functionalities with optimized power consumption. This work focuses on curbing power consumption at the design stage. This work emphasizes minimizing active power consumption by minimizing the load capacitance of the chip. Capacitance of wires and vias can be minimized using Ant Colony Optimization (ACO) algorithms. ACO provides a multi agent framework for combinatorial optimization problems and hence is used to handle multiple constraints of minimizing wire-length and vias to achieve the goal of minimizing capacitance and hence power consumption. The ACO developed here is able to achieve an 8% reduction of wire-length and 7% reduction in vias thereby providing a 7% reduction in total capacitance, compared to other state of the art routers

Tunnel Engineering

This volume presents a selection of chapters covering a wide range of tunneling engineering topics. The scope was to present reviews of established methods and new approaches in construction practice and in digital technology tools like building information modeling. The book is divided in four sections dealing with geological aspects of tunneling, analysis and design, new challenges in tunnel construction, and tunneling in the digital era. Topics from site investigation and rock mass failure mechanisms, analysis and design approaches, and innovations in tunnel construction through digital tools are covered in 10 chapters. The references provided will be useful for further reading

Internationalizing "International Communication"

International communication as a field of inquiry is, in fact, not very “internationalized.” Rather, it has been taken as a conceptual extension or empirical application of U.S. communication, and much of the world outside the West has been socialized to adopt truncated versions of Pax Americana’s notion of international communication. At stake is the “subject position” of academic and cultural inquirers: Who gets to ask what kind of questions? It is important to note that the quest to establish universally valid “laws” of human society with little regard for cultural values and variations seems to be running out of steam. Many lines of intellectual development are reckoning with the important dimensions of empathetic understanding and subjective consciousness. In Internationalizing "International Communication," Lee and others argue that we must reject both America-writ-large views of the world and self-defeating mirror images that reject anything American or Western on the grounds of cultural incompatibility or even cultural superiority. The point of departure for internationalizing “international communication” must be precisely the opposite of parochialism – namely, a spirit of cosmopolitanism. Scholars worldwide have a moral responsibility to foster global visions and mutual understanding, which forms, metaphorically, symphonic harmony made of cacophonic sounds

A Parallel Genetic Algorithm for Placement and Routing on Cloud Computing Platforms

The design and implementation of today\u27s most advanced VLSI circuits and multi-layer printed circuit boards would not be possible without automated design tools that assist with the placement of components and the routing of connections between these components. In this work, we investigate how placement and routing can be implemented and accelerated using cloud computing resources. A parallel genetic algorithm approach is used to optimize component placement and the routing order supplied to a Lee\u27s algorithm maze router. A study of mutation rate, dominance rate, and population size is presented to suggest favorable parameter values for arbitrary-sized printed circuit board problems. The algorithm is then used to successfully design a Microchip PIC18 breakout board and Micrel Ethernet Switch. Performance results demonstrate that a 50X runtime performance improvement over a serial approach is achievable using 64 cloud computing cores. The results further suggest that significantly greater performance could be achieved by requesting additional cloud computing resources for additional cost. It is our hope that this work will serve as a framework for future efforts to improve parallel placement and routing algorithms using cloud computing resources

Progress towards arrays of qubits using diamond

The nitrogen vacancy centre (NV{ ) in diamond has promising properties for several applications in quantum computing and sensing. The works described in this thesis each contribute towards our ability to build systems using NV{ . One such aspiration is the capability to build scalable arrays of deterministically placed, high quality qubits which can be accessed optically. NV{ is a potential candidate however the best current method for entangling two NV{ centres requires that each one is in a separate cryostat which is not scalable. This work shows that single NV{ centres can be laser-written in arrays 6-30 µm deep inside of a diamond with spin coherence times that are an order of magnitude longer than previous laser-written NV{ centres and at least as long as naturally-occurring NV{ . This depth is suitable for integration with solid immersion lenses or optical cavities. Depth-dependent T2 measurements reveal which depths avoid surface-induced decoherence. Tens of thousands of these NV{ could be written into one diamond plate. Additionally a _bre coupled, cryogenic, uorescence confocal microscope has been developed to evaluate the possibilities for using scattered nanodiamonds for sensing at low temperatures

Internationalizing "International Communication"

International communication as a field of inquiry is, in fact, not very “internationalized.” Rather, it has been taken as a conceptual extension or empirical application of U.S. communication, and much of the world outside the West has been socialized to adopt truncated versions of Pax Americana’s notion of international communication. At stake is the “subject position” of academic and cultural inquirers: Who gets to ask what kind of questions? It is important to note that the quest to establish universally valid “laws” of human society with little regard for cultural values and variations seems to be running out of steam. Many lines of intellectual development are reckoning with the important dimensions of empathetic understanding and subjective consciousness. In Internationalizing "International Communication," Lee and others argue that we must reject both America-writ-large views of the world and self-defeating mirror images that reject anything American or Western on the grounds of cultural incompatibility or even cultural superiority. The point of departure for internationalizing “international communication” must be precisely the opposite of parochialism – namely, a spirit of cosmopolitanism. Scholars worldwide have a moral responsibility to foster global visions and mutual understanding, which forms, metaphorically, symphonic harmony made of cacophonic sounds

33rd Aerospace Mechanisms Symposium

The proceedings of the 33rd Aerospace Mechanisms Symposium are reported. JPL hosted the conference, which was held at the Pasadena Conference and Exhibition Center, Pasadena, California, on May 19-21, 1999. Lockheed Martin Missiles and Space cosponsored the symposium. Technology areas covered include bearings and tribology; pointing, solar array and deployment mechanisms; orbiter/space station; and other mechanisms for spacecraft