Rare Earth Silicate Formation: A Route Towards High-k for the 22 nm Node and Beyond, Journal of Telecommunications and Information Technology, 2009, nr 4

Over the last decade there has been a significant amount of research dedicated to finding a suitable high-k/metal gate stack to replace conventional SiON/poly-Si electrodes. Materials innovations and dedicated engineering work has enabled the transition from research lab to 300 mm production a reality, thereby making high-k/metal gate technology a pathway for continued transistor scaling. In this paper, we will present current status and trends in rare earthbased materials innovations; in particular Gd-based, for the high-k/metal gate technology in the 22 nm node. Key issues and challenges for the 22 nm node and beyond are also highlighted

Charging Phenomena at the Interface Between High-k Dielectrics and SiOx Interlayers, Journal of Telecommunications and Information Technology, 2010, nr 1

The transition regions of GdSiO/SiOx and HfO2/SiOx interfaces have been studied with the high-k layers deposited on silicon substrates. The existence of transition regions was verified by medium energy ion scattering (MEIS) data and transmission electron microscopy (TEM). From measurements of thermally stimulated current (TSC), electron states were found in the transition region of the HfO2/SiOx structures, exhibiting instability attributed to the flexible structural molecular network expected to surround the trap volumes. The investigations were focused especially on whether the trap states belong to an agglomeration consisting of a single charge polarity or of a dipole constellation. We found that flat-band voltage shifts of MOS structures, that reach constant values for increasing oxide thickness, cannot be taken as unique evidence for the existence of dipole layers

Journal of Telecommunications and Information Technology, 2009, nr 4

kwartalni

Journal of Telecommunications and Information Technology, 2010, nr 1

kwartalni

Study of High-k Dielectrics and their Interfaces on Semiconductors for Device Applications

This thesis has focused on two emerging applications of high-k dielectrics in Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and in Metal-InsulatorSemiconductor High Electron Mobility Transistors (MIS-HEMTs). The key aim has been to propose the best routes for passivation of semiconductor/high-k oxide interfaces by investigating the band alignments and interface properties of several oxides, such as Tm2O3, Ta2O5, ZrO2, Al2O3 and MgO, deposited on different semiconductors: Si, Ge, GaN, InGaAs and InGaSb. The electrical characterisation of fabricated MIS capacitor and (MIS)-HEMT devices have also been performed. Thulium silicate (TmSiO) has been identified as a promising candidate for integration as interfacial layer (IL) in HfO2/TiN MOSFETs. The physical properties of Tm2O3/IL/Si interface have been elucidated, where IL (TmSiO) has been formed using different post-deposition annealing (PDA) temperatures, from 550 to 750 °C. It has been found that the best-scaled stack (sub-nm IL) is formed at 550 °C PDA with a graded interface layer and a strong SiOx (Si 3+) component. A large valence band offset (VBO) of 2.8 eV and a large conduction band offset (CBO) of 1.9 eV have been derived for Tm2O3/Si by X-ray photoelectron spectroscopy (XPS) and variable angle spectroscopic ellipsometry. Further increase of device performance can be achieved by replacing Si with GaN for high frequency, high power and high-temperature operation. In this thesis, several GaN cleaning procedures have been considered: 30% NH4OH, 20% (NH4)2S, and 37% HCl. It has been found that the HCl treatment shows the lowest oxygen contamination and Garich surface, and hence has been used prior sputtering of Ta2O5, Al2O3, ZrO2 and MgO on GaN. The large VBOs of 1.1 eV and 1.2 eV have been derived for Al2O3 and MgO on GaN respectively, using XPS and Kraut’s method; the corresponding CBOs are 2.0 eV and 2.8 eV respectively, taking into account the band gaps of Al2O3 (6.5 eV) and MgO (7.4 eV) determined from XPS O 1s electron energy spectra. The lowest leakage currents were obtained for devices with Al2O3 and MgO, i.e. 5.3 ×10-6 A/cm2 and 3.2 ×10-6 A/cm2 at 1 V, respectively in agreement with high band offsets (> 1 eV). Furthermore, the effect of different surface treatments (HCl, O2 plasma and 1-Octadecanethiol (ODT)) prior to atomic layer deposition of Al2O3 on the GaN/AlGaN/GaN heterostructure has been investigated. The MIS-HEMTs fabricated using the low-cost ODT GaN surface treatment have been found to exhibit superior performance for power switching applications such as a low threshold voltage, VT of -12.3 V, hysteresis of 0.12 V, a small subthreshold voltage slope (SS) of 73 mV/dec, and a low density of interface states, Dit of 3.0 x10^12 cm-2eV-1. A comprehensive novel study of HfO2/InGaAs and Al2O3/InGaSb interfaces have also been conducted for use in III-V based MOSFETs. The addition of the plasma H2/TMA/H2 pre-cleaning has been found to be very effective in recovering etch damage on InGaAs, especially for (110) orientation, and led to the improvement of electrical characteristics. Furthermore, the combination of H2 plasma exposure and forming gas anneal yielded significantly improved metrics for Al2O3/InGaSb over the control HCltreated sample, with the 150 W plasma treatment giving both the highest capacitance and the lowest stretch out

Crecimiento de dieléctricos de alta permitividad mediante pulverización catódica de alta presión a partir de blancos metálicos

Tesis inédita de la Universidad Complutense de Madrid, Facultad de Ciencias Físicas, Departamento de Física Aplicada III (Electricidad y Electrónica), leída el 07/07/2016The integrated circuit based on complementary metal-oxide-semiconductor (CMOS) devices is currently the dominant technology in the microelectronic industry. Their success is based on their low static power consumption and their high integration density. The metal-oxide-semiconductor field effect transistors (MOSFETs) are the main component of this technology. Their dimensions have been decreasing during the last years following the Moore’s law. This downscaling has made possible their continuous performance improvement. However, the size shrinking produced an excessive increase in the leakage current density that made this technology to face several challenges. The introduction of high permittivity (κ) dielectrics permits the use of a thicker insulator film (thus, reducing the leakage current) but with a lower equivalent SiO2 thickness (EOT). Besides, the introduction of these materials also required a change in the poly-Si electrode, that became a pure metal. The main objective of this thesis was the fabrication of metal-insulator-semiconductor (MIS) structures using high κ dielectrics grown from metallic targets. This was performed by means of high pressure sputtering (HPS). The advantage introduced by this system is that, due to the high working pressure, the particles suffer many collisions (because their mean free path is much lower than the target-substrate distance) and get thermalized before reaching the substrate in a pure diffusion process. This way, the semiconductor surface damage is preserved. The key novelty of this work consisted on the fabrication process using metallic targets. A two-step deposition process was developed: first, a thin metallic film is sputtered in an Ar atmosphere and, afterwards, this film was in situ oxidized...Los circuitos integrados basados en los dispositivos CMOS (complementary metal-oxide-semiconductor) son en la actualidad la tecnología dominante de la industria microelectrónica. Su éxito se basa en su bajo consumo de potencia estática y en su alta capacidad de integración. Esto ha hecho que las dimensiones de los transistores de efecto campo metal-óxido-semiconductor (MOSFET, metal-oxide-semiconductor field effect transistor), que es el dispositivo principal de dicha tecnología, se hayan ido reduciendo durante los últimos años de acuerdo a la ley de Moore. A medida que los tamaños se fueron reduciendo, proceso habitualmente denominado escalado, las prestaciones de los transistores mejoraban. Sin embargo, esta continua reducción de los transistores lleva asociada una excesiva corriente de fugas que hace que los transistores dejen de funcionar de una manera óptima. Por tanto, los dieléctricos de alta permitividad (κ) se introdujeron para permitir emplear aislantes de mayor espesor físico (y así reducir las fugas), pero con un menor espesor de óxido de silicio equivalente (EOT, equivalent oxide thickness). El cambio en el material aislante de la puerta lleva asociado también un cambio en el electrodo metálico...Depto. de Estructura de la Materia, Física Térmica y ElectrónicaFac. de Ciencias FísicasTRUEunpu