The effect of an optical network on-chip on the performance of chip multiprocessors

Optical networks on-chip (ONoC) have been proposed to reduce power consumption and increase bandwidth density in high performance chip multiprocessors (CMP), compared to electrical NoCs. However, as buffering in an ONoC is not viable, the end-to-end message path needs to be acquired in advance during which the message is buffered at the network ingress. This waiting latency is therefore a combination of path setup latency and contention and forms a significant part of the total message latency. Many proposed ONoCs, such as Single Writer, Multiple Reader (SWMR), avoid path setup latency at the expense of increased optical components. In contrast, this thesis investigates a simple circuit-switched ONoC with lower component count where nodes need to request a channel before transmission. To hide the path setup latency, a coherence-based message predictor is proposed, to setup circuits before message arrival. Firstly, the effect of latency and bandwidth on application performance is thoroughly investigated using full-system simulations of shared memory CMPs. It is shown that the latency of an ideal NoC affects the CMP performance more than the NoC bandwidth. Increasing the number of wavelengths per channel decreases the serialisation latency and improves the performance of both ONoC types. With 2 or more wavelengths modulating at 25 Gbit=s , the ONoCs will outperform a conventional electrical mesh (maximal speedup of 20%). The SWMR ONoC outperforms the circuit-switched ONoC. Next coherence-based prediction techniques are proposed to reduce the waiting latency. The ideal coherence-based predictor reduces the waiting latency by 42%. A more streamlined predictor (smaller than a L1 cache) reduces the waiting latency by 31%. Without prediction, the message latency in the circuit-switched ONoC is 11% larger than in the SWMR ONoC. Applying the realistic predictor reverses this: the message latency in the SWMR ONoC is now 18% larger than the predictive circuitswitched ONoC

Wind Power

This book is the result of inspirations and contributions from many researchers of different fields. A wide verity of research results are merged together to make this book useful for students and researchers who will take contribution for further development of the existing technology. I hope you will enjoy the book, so that my effort to bringing it together for you will be successful. In my capacity, as the Editor of this book, I would like to thanks and appreciate the chapter authors, who ensured the quality of the material as well as submitting their best works. Most of the results presented in to the book have already been published on international journals and appreciated in many international conferences

Increasing the capacity of the Low Voltage Distribution Networks using All-SiC AC-AC Converters

Towards 2020, future energy scenarios predict an excessive penetration of distributed generation (DG) in low voltage (LV) networks as well as a significant uptake of electric vehicles (EVs) and electro-heating. The Distribution Network Operators (DNOs) in UK will face significant challenges towards this de-carbonised electricity generation and consumption shift. The deployment of these so-called low carbon technologies (LCTs) will impact the performance of the distribution network in such way where solutions will be needed to maintain capacity, reliability and the availability of the electricity supply to customers. The practise to put more copper on the ground – reinforcement - in order to facilitate these changes is found to be expensive and disruptive to the public and business. An innovative solution proposed in this thesis is to increase the voltage along the distribution feeders and step it back down at a customer’s premises. Results show that a significant increase at the hosting capacity of the existing network can be achieved and power quality problems such as overvoltage caused by DG can be avoided. The voltage step-down device, which is termed a voltage control unit (VCU), is to be located in the meter-box of each house. This location raises challenges round the temperature rise in the box caused by VCU losses, and the subsequent effect on the electricity meter and cut-out fuse. It also imposes constraints on the size and weight of the VCU so that a very high efficiency design is required, with high power density and small mass. The optimum VCU design was found to be a power electronic AC Chopper using new Silicon Carbide (SiC) MOSFETs and diodes. The technology was demonstrated by designing, constructing and testing two interleaved, parallel operation, 1 kW AC Chopper modules. Results from the prototype were compared against Spice simulation results and theory and confirmed that the target efficiency of 99% was achieved

Scalable Emulation of Heterogeneous Systems

The breakdown of Dennard's transistor scaling has driven computing systems toward application-specific accelerators, which can provide orders-of-magnitude improvements in performance and energy efficiency over general-purpose processors. To enable the radical departures from conventional approaches that heterogeneous systems entail, research infrastructure must be able to model processors, memory and accelerators, as well as system-level changes---such as operating system or instruction set architecture (ISA) innovations---that might be needed to realize the accelerators' potential. Unfortunately, existing simulation tools that can support such system-level research are limited by the lack of fast, scalable machine emulators to drive execution. To fill this need, in this dissertation we first present a novel machine emulator design based on dynamic binary translation that makes the following improvements over the state of the art: it scales on multicore hosts while remaining memory efficient, correctly handles cross-ISA differences in atomic instruction semantics, leverages the host floating point (FP) unit to speed up FP emulation without sacrificing correctness, and can be efficiently instrumented to---among other possible uses---drive the execution of a full-system, cross-ISA simulator with support for accelerators. We then demonstrate the utility of machine emulation for studying heterogeneous systems by leveraging it to make two additional contributions. First, we quantify the trade-offs in different coupling models for on-chip accelerators. Second, we present a technique to reuse the private memories of on-chip accelerators when they are otherwise inactive to expand the system's last-level cache, thereby reducing the opportunity cost of the accelerators' integration

Measurements, Models, Systems and Design

531 s.

Dependable Embedded Systems

This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems

Speeding Up AC Circuit Co-Simulations Through Selective Simulator Decoupling of Predictable States

Co-simulation has become increasingly popular as a tool for dealing with the unprecedented complexity of modern engineering systems, such as electrical power systems and the AC circuits that compose them. Co-simulation is useful when migrating the models of each subsystem to a single monolithic simulator is either impractical or impossible, and the need for understanding the interactions between the subsystems does not leave room for model simplifications. However, co-simulation can suffer from long execution times, caused by the overhead introduced by exchanging variables between simulators. In this paper, we propose a method that mitigates this overhead by decoupling the simulators whenever their inputs become predictable. We applied this method to the co-simulation of an AC circuit composed of two subsystems and obtained speedups of up to 39% with errors that remain around 1% most of the time. Although questions regarding the scalability of the method persist, these results indicate that the method has the potential to make co-simulation an even more valuable tool for the user.Intelligent Electrical Power Grid

Renewable Energy

Renewable Energy is energy generated from natural resources - such as sunlight, wind, rain, tides and geothermal heat - which are naturally replenished. In 2008, about 18% of global final energy consumption came from renewables, with 13% coming from traditional biomass, such as wood burning. Hydroelectricity was the next largest renewable source, providing 3% (15% of global electricity generation), followed by solar hot water/heating, which contributed with 1.3%. Modern technologies, such as geothermal energy, wind power, solar power, and ocean energy together provided some 0.8% of final energy consumption. The book provides a forum for dissemination and exchange of up - to - date scientific information on theoretical, generic and applied areas of knowledge. The topics deal with new devices and circuits for energy systems, photovoltaic and solar thermal, wind energy systems, tidal and wave energy, fuel cell systems, bio energy and geo-energy, sustainable energy resources and systems, energy storage systems, energy market management and economics, off-grid isolated energy systems, energy in transportation systems, energy resources for portable electronics, intelligent energy power transmission, distribution and inter - connectors, energy efficient utilization, environmental issues, energy harvesting, nanotechnology in energy, policy issues on renewable energy, building design, power electronics in energy conversion, new materials for energy resources, and RF and magnetic field energy devices

3D-in-2D Displays for ATC.

This paper reports on the efforts and accomplishments of the 3D-in-2D Displays for ATC project at the end of Year 1. We describe the invention of 10 novel 3D/2D visualisations that were mostly implemented in the Augmented Reality ARToolkit. These prototype implementations of visualisation and interaction elements can be viewed on the accompanying video. We have identified six candidate design concepts which we will further research and develop. These designs correspond with the early feasibility studies stage of maturity as defined by the NASA Technology Readiness Level framework. We developed the Combination Display Framework from a review of the literature, and used it for analysing display designs in terms of display technique used and how they are combined. The insights we gained from this framework then guided our inventions and the human-centered innovation process we use to iteratively invent. Our designs are based on an understanding of user work practices. We also developed a simple ATC simulator that we used for rapid experimentation and evaluation of design ideas. We expect that if this project continues, the effort in Year 2 and 3 will be focus on maturing the concepts and employment in a operational laboratory settings