Unveiling microstructural damage for leakage current degradation in SiC Schottky diode after heavy ions irradiation under 200 V

Single-event burnout and single-event leakage current (SELC) in SiC power devices induced by heavy ions severely limit their space application, and the underlying mechanism is still unclear. One fundamental problem is lack of high-resolution characterization of radiation damage in the irradiated SiC power devices, which is a crucial indicator of the related mechanism. In this letter, high-resolution transmission electron microscopy (TEM) was used to characterize the radiation damage in the 1437.6 MeV 181Ta-irradiated SiC junction barrier Schottky diode under 200 V. The amorphous radiation damage with about 52 nm in diameter and 121 nm in length at the Schottky metal (Ti)-semiconductor (SiC) interface was observed. More importantly, in the damage site the atomic mixing of Ti, Si, and C was identified by electron energy loss spectroscopy and high-angle annular dark-field scanning TEM. It indicates that the melting of the Ti-SiC interface induced by localized Joule heating is responsible for the amorphization and the formation of titanium silicide, titanium carbide, or ternary phases. These modifications at nanoscale in turn cause the localized degradation of the Schottky contact into Ohmic contact, resulting in the permanent increase in leakage current. This experimental study provides some valuable clues to thorough understanding of the SELC mechanism in SiC diode.Comment: 4 pages,4 figure

Feature Papers in Electronic Materials Section

This book entitled "Feature Papers in Electronic Materials Section" is a collection of selected papers recently published on the journal Materials, focusing on the latest advances in electronic materials and devices in different fields (e.g., power- and high-frequency electronics, optoelectronic devices, detectors, etc.). In the first part of the book, many articles are dedicated to wide band gap semiconductors (e.g., SiC, GaN, Ga2O3, diamond), focusing on the current relevant materials and devices technology issues. The second part of the book is a miscellaneous of other electronics materials for various applications, including two-dimensional materials for optoelectronic and high-frequency devices. Finally, some recent advances in materials and flexible sensors for bioelectronics and medical applications are presented at the end of the book

4H-SiC Integrated circuits for high temperature and harsh environment applications

Silicon Carbide (SiC) has received a special attention in the last decades thanks to its superior electrical, mechanical and chemical proprieties. SiC is mostly used for applications where Silicon is limited, becoming a proper material for both unipolar and bipolar power device able to work under high power, high frequency and high temperature conditions. Aside from the outstanding theoretical and practical advantages still to be proved in SiC devices, the need for more accurate models for the design and optimization of these devices, along with the development of integrated circuits (ICs) on SiC is indispensable for the further success of modern power electronics. The design and development of SiC ICs has become a necessity since the high temperature operation of ICs is expected to enable important improvements in aerospace, automotive, energy production and other industrial systems. Due to the last impressive progresses in the manufacturing of high quality SiC substrates, the possibility of developing ICs applications is now feasible. SiC unipolar transistors, such as JFETs and MESFETs show a promising potential for digital ICs operating at high temperature and in harsh environments. The reported ICs on SiC have been realized so far with either a small number of elements, or with a low integration density. Therefore, this work demonstrates that by means of our SiC MESFET technology, multi-stage digital ICs fabrication containing a large number of 4H-SiC devices is feasible, accomplishing some of the most important ICs requirements. The ultimate objective is the development of SiC digital building blocks by transferring the Si CMOS topologies, hence demonstrating that the ICs SiC technology can be an important competitor of the Si ICs technology especially in application fields in which high temperature, high switching speed and harsh environment operations are required. The study starts with the current normally-on SiC MESFET CNM complete analysis of an already fabricated MESFET. It continues with the modeling and fabrication of a new planar-MESFET structure together with new epitaxial resistors specially suited for high temperature and high integration density. A novel device isolation technique never used on SiC before is approached. A fabrication process flow with three metal levels fully compatible with the CMOS technology is defined. An exhaustive experimental characterization at room and high temperature (300ºC) and Spice parameter extractions for both structures are performed. In order to design digital ICs on SiC with the previously developed devices, the current available topologies for normally-on transistors are discussed. The circuits design using Spice modeling, the process technology, the fabrication and the testing of the 4H-SiC MESFET elementary logic gates library at high temperature and high frequencies are performed. The MESFET logic gates behavior up to 300ºC is analyzed. Finally, this library has allowed us implementing complex multi-stage logic circuits with three metal levels and a process flow fully compatible with a CMOS technology. This study demonstrates that the development of important SiC digital blocks by transferring CMOS topologies (such as Master Slave Data Flip-Flop and Data-Reset Flip-Flop) is successfully achieved. Hence, demonstrating that our 4H-SiC MESFET technology enables the fabrication of mixed signal ICs capable to operate at high temperature (300ºC) and high frequencies (300kHz). We consider this study an important step ahead regarding the future ICs developments on SiC. Finally, experimental irradiations were performed on W-Schotthy diodes and mesa-MESFET devices (with the same Schottky gate than the planar SiC MESFET) in order to study their radiation hardness stability. The good radiation endurance of SiC Schottky-gate devices is proven. It is expected that the new developed devices with the same W-Schottky gate, to have a similar behavior in radiation rich environments.Postprint (published version

Development of a fault tolerant MOS field effect power semiconductor switching transistor

This work describes the development of a semiconductor switch to replace an electromechanical contactor as used within the electrical power distribution system of the More Electric Aircraft (MEA; a project begun in the 1990‟s by the United States Air Force). The MEA is safety critical and therefore requires highest reliability components and systems, but subsequent to a short circuit load fault the electro-mechanical contactor switch often welds shut. This risk is increased when using high discharge energy lithium ion dc batteries. Predominately the semiconductor switch controls inductive loads and is required to safely turn off current of up to 10 times the nominal level during sporadic load fault events. The switch requires the lowest static loss (lowest on state resistance), but also the lowest dynamic loss (losses due to the switching event). Presently, unipolar devices provide the lowest dynamic loss, but bipolar devices provide the lowest static loss. One possible solution is use of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the area of which is sized to suit the fault current, but at relatively high cost in terms of silicon area. The resultant area is typically achieved by several die connected in parallel, unfortunately, such a solution suffers from current share imbalance and the potential of cascade die failure. The use of a parallel combination of unipolar and bipolar device types (MOSFET and Insulated Gate Bipolar Transistors, IGBTs) to form a hybrid appears to offer the potential to reduce the silicon area, and static loss, whilst reducing the impact of the increased dynamic losses of the IGBT. Unfortunately, this goal requires optimised gate timing of the resultant hybrid which proves challenging if the load current is to be shared appropriately during fault switching in order to prevent failure. Some form of single MOS (Metal Oxide Semiconductor) gated integrated hybrid device with self biased bipolar injection is therefore required to ensure highest reliability through a non latching design which offers lowest losses under all conditions and achieves an even temperature distribution. In this work the novel concept of the integrated hybrid device has been investigated at a low Blocking Voltage (BV) rating of 100 V, using computer simulation. The three terminal hybrid silicon DMOS (Double diffused Metal Oxide Semiconductor) device utilises a novel merged Schottky p-type injector to provide self biased entry into a reduced static loss bipolar state in the event of high fault current. The device achieves a specific on state resistance, R(ON,SP) = 1.16 mΩcm2 in bipolar mode (with BV=84 V), that is below the silicon limit line and requires half the area of a traditional unipolar MOSFET to conduct fault current. During comparative standard unclamped inductive switching trials, the hybrid device provides a self clamping action which enables increased inductive energy switching (higher inductance and/or higher load current), relative to that achieved by either the MOSFET or IGBT. The hybrid conducting in bipolar mode switches an inductive load off much faster than that typically achieved by an IGBT (toff =20 ns, in comparison to typically >10 μs for an IGBT). This results in a low turn off energy for the hybrid (1.26*10-4 J/cm2) as compared to that of the IGBT (8.72*10-3 J/cm2). The hybrid dynamic performance is enhanced by the action of the merged Schottky contact which, unlike the IGBT, acts to limit the emitter base voltage (VEB) of the internal PNP Bipolar Junction Transistor, BJT (the integral PNP BJT is otherwise a shared feature with the IGBT). The self biased bipolar activation is achieved at a forward bias (VAK) =1.3 V at temperature (T)= 300 K. The device is latch up free across the operational temperature range of T=233 K to 400 K. A viable charge balanced structure to increase the BV rating to approximately 600 V is also proposed. The resulting performance of the single gated, self biased, hybrid, utilising a novel merged Schottky/P type injector, could lead to a new class of rugged MOS gated power switching devices in silicon and potentially silicon carbide

Fabrication and analysis of 4H-SiC diodes

Despite the excellent electrical and thermal properties of 4H-silicon carbide (SiC) and the advancements in the field of 4H-SiC epitaxial growth, the existence of defects in the material can considerably reduce the electrical performance of the SiC power devices. Defects can result in low carrier lifetime affecting the on-state resistance of bipolar devices, such as PiN diodes, and increased leakage current affecting the reverse blocking performance of power devices, such as Schottky diodes. A commonly found surface morphological defect in available 4H-SiC substrates is the triangular defect. In this thesis, the formation mechanism of this defect and its impact on the electrical performance of the fabricated 4H-SiC PiN diodes is discussed. 4H-SiC PiN diodes were intentionally fabricated on the triangular defects and in areas with no visible morphological defects. The devices were then packaged and tested to assess the impact of these defects on the resulting on-state and reverse leakage characteristics. It was shown for the first time the impact of triangular defects on switching characteristics of 4H-SiC PiN diodes fabricated on- and off-defects. Moreover, triangular defects were characterised using methods including AFM, SEM, Photoluminescence and HRTEM. Other complex structures were observed on the triangular defect using HRTEM such as double positioning boundary (DPB), which resulted in a leakage path through the drift region of the devices and increased the leakage current. Furthermore, this thesis focuses on the fabrication and analysis of 4H-SiC power diodes for high voltage applications with particular focus on improving the performance of 4H-SiC SBDs using a novel metal-semiconductor interface treatment and 4H-SiC PiN diodes using high temperature processing techniques to improve the carrier lifetime, on-state resistance and conductivity modulation of the diode. Carrier lifetime enhancement in 4H-SiC PiN diodes in this thesis was achieved using a combined high temperature oxidation and successive argon annealing process at 1550°C for 1 hour. This resulted in an increase of nearly 45% of the reverse recovery current and approximately 40% of the carrier lifetime. The findings of this study could be potentially used for other 4H-SiC bipolar devices such as IGBTs, BJTs and thyristors. This thesis has also investigated the impact of various surface passivation treatments to improve the quality of the 4H-SiC surface and the metal-semiconductor interface using Mo/Ti, and Ni-4H-SiC Schottky diodes. The most significant outcome of this investigation was the performance of P2O5 treated Mo/SiC Schottky diodes which retained a barrier height equivalent to that of titanium, but with a leakage current lower than any Ni diode, seemingly combining the benefits of both a low- and high-SBH metal. Furthermore, P2O5 treated Mo/SiC Schottky diodes were the only diodes to undergo any significant leakage current reduction after any of the pre-treatments exhibiting exceptionally low leakage, even at 300°C. XPS and SIMS analysis on all Mo/SiC SBDs revealed that the stoichiometry of the SiC underneath the contact was enhanced using P2O5 treatment and that traces of P2O5 were found after removal of the passivation layer and post-treatment metallisation. It was also found that the Mo-4HSiC interface on the P2O5 treated sample was very sharp and uniform compared to the untreated sample where Mo-SiC interface looks uneven and cloudy. The developed novel metal-semiconductor interface treatment can be potentially used for MOS interface improvements

Wide Bandgap Based Devices

Emerging wide bandgap (WBG) semiconductors hold the potential to advance the global industry in the same way that, more than 50 years ago, the invention of the silicon (Si) chip enabled the modern computer era. SiC- and GaN-based devices are starting to become more commercially available. Smaller, faster, and more efficient than their counterpart Si-based components, these WBG devices also offer greater expected reliability in tougher operating conditions. Furthermore, in this frame, a new class of microelectronic-grade semiconducting materials that have an even larger bandgap than the previously established wide bandgap semiconductors, such as GaN and SiC, have been created, and are thus referred to as “ultra-wide bandgap” materials. These materials, which include AlGaN, AlN, diamond, Ga2O3, and BN, offer theoretically superior properties, including a higher critical breakdown field, higher temperature operation, and potentially higher radiation tolerance. These attributes, in turn, make it possible to use revolutionary new devices for extreme environments, such as high-efficiency power transistors, because of the improved Baliga figure of merit, ultra-high voltage pulsed power switches, high-efficiency UV-LEDs, and electronics. This Special Issue aims to collect high quality research papers, short communications, and review articles that focus on wide bandgap device design, fabrication, and advanced characterization. The Special Issue will also publish selected papers from the 43rd Workshop on Compound Semiconductor Devices and Integrated Circuits, held in France (WOCSDICE 2019), which brings together scientists and engineers working in the area of III–V, and other compound semiconductor devices and integrated circuits

GaN-based power devices: Physics, reliability, and perspectives

Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semicon- ductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spon- taneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high- voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench- structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main proper- ties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics

Miniaturized Silicon Photodetectors

Silicon (Si) technologies provide an excellent platform for the design of microsystems where photonic and microelectronic functionalities are monolithically integrated on the same substrate. In recent years, a variety of passive and active Si photonic devices have been developed, and among them, photodetectors have attracted particular interest from the scientific community. Si photodiodes are typically designed to operate at visible wavelengths, but, unfortunately, their employment in the infrared (IR) range is limited due to the neglectable Si absorption over 1100 nm, even though the use of germanium (Ge) grown on Si has historically allowed operations to be extended up to 1550 nm. In recent years, significant progress has been achieved both by improving the performance of Si-based photodetectors in the visible range and by extending their operation to infrared wavelengths. Near-infrared (NIR) SiGe photodetectors have been demonstrated to have a “zero change” CMOS process flow, while the investigation of new effects and structures has shown that an all-Si approach could be a viable option to construct devices comparable with Ge technology. In addition, the capability to integrate new emerging 2D and 3D materials with Si, together with the capability of manufacturing devices at the nanometric scale, has led to the development of new device families with unexpected performance. Accordingly, this Special Issue of Micromachines seeks to showcase research papers, short communications, and review articles that show the most recent advances in the field of silicon photodetectors and their respective applications