Enhanced Hardware Security Using Charge-Based Emerging Device Technology

The emergence of hardware Trojans has largely reshaped the traditional view that the hardware layer can be blindly trusted. Hardware Trojans, which are often in the form of maliciously inserted circuitry, may impact the original design by data leakage or circuit malfunction. Hardware counterfeiting and IP piracy are another two serious issues costing the US economy more than $200 billion annually. A large amount of research and experimentation has been carried out on the design of these primitives based on the currently prevailing CMOS technology. However, the security provided by these primitives comes at the cost of large overheads mostly in terms of area and power consumption. The development of emerging technologies provides hardware security researchers with opportunities to utilize some of the otherwise unusable properties of emerging technologies in security applications. In this dissertation, we will include the security consideration in the overall performance measurements to fully compare the emerging devices with CMOS technology. The first approach is to leverage two emerging devices (Silicon NanoWire and Graphene SymFET) for hardware security applications. Experimental results indicate that emerging device based solutions can provide high level circuit protection with relatively lower performance overhead compared to conventional CMOS counterpart. The second topic is to construct an energy-efficient DPA-resilient block cipher with ultra low-power Tunnel FET. Current-mode logic is adopted as a circuit-level solution to countermeasure differential power analysis attack, which is mostly used in the cryptographic system. The third investigation targets on potential security vulnerability of foundry insider\u27s attack. Split manufacturing is adopted for the protection on radio-frequency (RF) circuit design

Removing Redundant Logic Pathways in Polymorphic Circuits

Evaluating the quality of software and circuit obfuscators is a research goal of great interest. However, there exists little research about evaluation of obfuscation effectiveness through analyzing and investigating redundancies found in the obfuscated variants. In this research, we consider programs represented as structural combinational circuits and then analyze obfuscated variants of those circuits through a tool that produces functionally equivalent variants based on subcircuit selection and replacement. We then consider how Boolean logic and reduction affects the size and levelization of circuit variants, giving us a concrete metric by which to consider obfuscation effectiveness. To accomplish these goals, we create an experimental environment based on a set of predefined circuits, a set of predefined algorithms which produce variants of those circuits, and a collection of logic reduction techniques and tools. We build logic reduction techniques using predefined patterns and predefined functions expressed as truth tables. As a contribution, we characterize and evaluate the effectiveness of obfuscating algorithms based on these reduction techniques. We show, for the circuits we observe, optimization on size is affected by ordering of the specific reduction patterns and functions. We also show, for the circuits we observe, reduction is affected by the specific obfuscating algorithm used to produce the variant. Based on these results, we provide a promising measurement of interest to compare both circuit variants and obfuscating algorithms

Anti-Tamper Method for Field Programmable Gate Arrays Through Dynamic Reconfiguration and Decoy Circuits

As Field Programmable Gate Arrays (FPGAs) become more widely used, security concerns have been raised regarding FPGA use for cryptographic, sensitive, or proprietary data. Storing or implementing proprietary code and designs on FPGAs could result in the compromise of sensitive information if the FPGA device was physically relinquished or remotely accessible to adversaries seeking to obtain the information. Although multiple defensive measures have been implemented (and overcome), the possibility exists to create a secure design through the implementation of polymorphic Dynamically Reconfigurable FPGA (DRFPGA) circuits. Using polymorphic DRFPGAs removes the static attributes from their design; thus, substantially increasing the difficulty of successful adversarial reverse-engineering attacks. A variety of dynamically reconfigurable methodologies exist for implementation that challenge designers in the reconfigurable technology field. A Hardware Description Language (HDL) DRFPGA model is presented for use in security applications. The Very High Speed Integrated Circuit HDL (VHSIC) language was chosen to take advantage of its capabilities, which are well suited to the current research. Additionally, algorithms that explicitly support granular autonomous reconfiguration have been developed and implemented on the DRFPGA as a means of protecting its designs. Documented testing validates the reconfiguration results and compares power usage, timing, and area estimates from a conventional and DRFPGA model

Provably Trustworthy and Secure Hardware Design with Low Overhead

Due to the globalization of IC design in the semiconductor industry and outsourcing of chip manufacturing, 3PIPs become vulnerable to IP piracy, reverse engineering, counterfeit IC, and hardware Trojans. To thwart such attacks, ICs can be protected using logic encryption techniques. However, strong resilient techniques incur significant overheads. SCAs further complicate matters by introducing potential attacks post-fabrication. One of the most severe SCAs is PA attacks, in which an attacker can observe the power variations of the device and analyze them to extract the secret key. PA attacks can be mitigated via adding large extra hardware; however, the overheads of such solutions can render them impractical, especially when there are power and area constraints. In our first approach, we present two techniques to prevent normal attacks. The first one is based on inserting MUX equal to half/full of the output bit number. In the second technique, we first design PLGs using SiNW FETs and then replace some logic gates in the original design with their SiNW FETs-based PLGs counterparts. In our second approach, we use SiNW FETs to produce obfuscated ICs that are resistant to advanced reverse engineering attacks. Our method is based on designing a small block, whose output is untraceable, namely URSAT. Since URSAT may not offer very strong resilience against the combined AppSAT-removal attack, S-URSAT is achieved using only CMOS-logic gates, and this increases the security level of the design to robustly thwart all existing attacks. In our third topic, we present the usage of ASLD to produce secure and resilient circuits that withstand IC attacks (during the fabrication) and PA attacks (after fabrication). First, we show that ASLD has unique features that can be used to prevent PA and IC attacks. In our three topics, we evaluate each design based on performance overheads and security guarantees

SYNTHESIS AND EVALUATION OF ANTIMICROBIAL ACTIVITY OF PHENYL AND FURAN-2-YL[1,2,4] TRIAZOLO[4,3-a]QUINOXALIN-4(5H)-ONE AND THEIR HYDRAZONE PRECURSORS

A variety of 1-(s-phenyl)-[1,2,4]triazolo[4,3-a]quinoxalin-4(5H)-one (3a-3h) and 1-(s-furan-2-yl)-[1,2,4]triazolo[4,3- a]quinoxalin-4(5H)-one (5a-d) were synthesized from thermal annelation of corresponding hydrazones (2a-h) and (4a-d) respectively in the presence of ethylene glycol which is a high boiling solvent. The structures of the compounds prepared were confirmed by analytical and spectral data. Also, the newly synthesized compounds were evaluated for possible antimicrobial activity. 3-(2-(4-hydroxylbenzylidene)hydrazinyl)quinoxalin-2(1H)-one (2e) was the most active antibacterial agent while 1-(5-Chlorofuran-2-yl)-[1,2,4]triazolo[4,3-a]quinoxalin-4(5H)-one (5c) stood out as the most potent antifungal agent

Function Implementation in a Multi-Gate Junctionless FET Structure

Title from PDF of title page, viewed September 18, 2023Dissertation advisor: Mostafizur RahmanVitaIncludes bibliographical references (pages 95-117)Dissertation (Ph.D.)--Department of Computer Science and Electrical Engineering, Department of Physics and Astronomy. University of Missouri--Kansas City, 2023This dissertation explores designing and implementing a multi-gate junctionless field-effect transistor (JLFET) structure and its potential applications beyond conventional devices. The JLFET is a promising alternative to conventional transistors due to its simplified fabrication process and improved electrical characteristics. However, previous research has focused primarily on the device's performance at the individual transistor level, neglecting its potential for implementing complex functions. This dissertation fills this research gap by investigating the function implementation capabilities of the JLFET structure and proposing novel circuit designs based on this technology. The first part of this dissertation presents a comprehensive review of the existing literature on JLFETs, including their fabrication techniques, operating principles, and performance metrics. It highlights the advantages of JLFETs over traditional metal-oxide-semiconductor field-effect transistors (MOSFETs) and discusses the challenges associated with their implementation. Additionally, the review explores the limitations of conventional transistor technologies, emphasizing the need for exploring alternative device architectures. Building upon the theoretical foundation, the dissertation presents a detailed analysis of the multi-gate JLFET structure and its potential for realizing advanced functions. The study explores the impact of different design parameters, such as channel length, gate oxide thickness, and doping profiles, on the device performance. It investigates the trade-offs between power consumption, speed, and noise immunity, and proposes design guidelines for optimizing the function implementation capabilities of the JLFET. To demonstrate the practical applicability of the JLFET structure, this dissertation introduces several novel circuit designs based on this technology. These designs leverage the unique characteristics of the JLFET, such as its steep subthreshold slope and improved on/off current ratio, to implement complex functions efficiently. The proposed circuits include arithmetic units, memory cells, and digital logic gates. Detailed simulations and analyses are conducted to evaluate their performance, power consumption, and scalability. Furthermore, this dissertation explores the potential of the JLFET structure for emerging technologies, such as neuromorphic computing and bioelectronics. It investigates how the JLFET can be employed to realize energy-efficient and biocompatible devices for applications in artificial intelligence and biomedical engineering. The study investigates the compatibility of the JLFET with various materials and substrates, as well as its integration with other functional components. In conclusion, this dissertation contributes to the field of nanoelectronics by providing a comprehensive investigation into the function implementation capabilities of the multi-gate JLFET structure. It highlights the potential of this device beyond its individual transistor performance and proposes novel circuit designs based on this technology. The findings of this research pave the way for the development of advanced electronic systems that are more energy-efficient, faster, and compatible with emerging applications in diverse fields.Introduction -- Literature review -- Crosstalk principle -- Experiment of crosstalk -- Device architecture -- Simulation & results -- Conclusio

Integrating host population contact structure and pathogen whole-genome sequence data to understand the epidemiology of infectious diseases : a thesis presented in partial fulfilment of the requirements for the degree of Doctor of Philosophy, Massey University, Manawatū, New Zealand

With advances in high-throughput sequencing technologies, computational biology, and evolutionary modelling, pathogen sequence data is increasingly being used to inform infectious disease outbreak investigations; supporting inferences on the timing and directionality of transmission as well as providing insights into pathogen evolutionary dynamics and the development of antimicrobial resistance. This thesis focuses on the application of pathogen whole-genome sequence data in conjunction with social network analysis to investigate the transmission dynamics of two important pathogens; Campylobacter jejuni and Staphylococcus aureus. The first four studies centre around the recent emergence of an antimicrobial-resistant C. jejuni strain that was found to have rapidly spread throughout the New Zealand commercial poultry industry. All four studies build on the results of an industry survey that were not only used to determine the basic farm demographics and biosecurity practices of all poultry producers, but also to construct five contact networks representing the on- and off-farm movement patterns of goods and services. Contact networks were used in study one to investigate the relationship between farm-level contact risk pathways and the reported level of biosecurity. However, despite many farms having a number of contact risk pathways, no relationship was found due to the high level of variability in biosecurity practices between producers. In study two the contact risk between commercial poultry, backyard poultry, and wild birds was investigated by examining the spatial overlap between the commercial contact networks and (i) all poultry transactions made through the online auction website TradeMe® and, (ii) all wild bird observations made through the online citizen science bird monitoring project, eBird, with study results suggesting that the greatest risk is due to the growing number of online trades made over increasingly long distances and shorter timespans. Study three further uses the commercial contact networks to investigate the role of multiple transmission pathways on the genetic relatedness of 167 C. jejuni isolates sampled from across 30 commercial poultry farms. Permutational multivariate analysis of variance and distance-based linear models were used to explore the relative importance of network distances as potential determinants of the pairwise genetic relatedness between the C. jejuni isolates, with study results highlighting the importance of transporting feed vehicles in addition to the geographical proximity of farms and the parent company in the spread of disease. In the last of the four C. jejuni studies, a compartmental disease transmission model was developed to simulate both the spread and sequence mutations across an outbreak within the commercial poultry industry. Simulated sequences were used in an analysis mirroring the methods used in study three in order to validate the approaches examining the contribution of local contacts and network contacts towards disease transmission. An additional analysis is also performed in which the simulated sequence data is used to infer a transmission tree and explore the use of pathogen phylogenies in determining who-infected-whom across different model systems. A further study, motivated by the application of whole-genome sequence data to infer transmission, investigated the spread of S. aureus within the New Zealand dairy industry. This study demonstrated how whole-genome sequence data can be used to investigate pathogen population and evolutionary dynamics at multiple scales: from local to national and international. For this study, the genetic relatedness between 57 bovine-derived S. aureus isolates sampled from across 17 New Zealand dairy herds were compared with 59 S. aureus isolates that had been previously sampled and characterised from humans and domestic pets from across New Zealand and 103 S. aureus isolates extracted from GenBank that included both human and livestock isolates sampled from across 19 countries. Results from this study not only support evidence showing that the movement of live animals is an important risk factor for the spread of S. aureus, but also show that using cattle-tracing data alone may not be enough to fully capture the between farm transmission dynamics of S. aureus. Overall, by using these two pathogen examples, this thesis demonstrates the potential use of pathogen whole-genome sequence data alongside contact network data in an epidemiological investigation, whilst highlighting the limitations and future challenges that must be considered in order to continue to develop robust methods that can be used to reliably infer the transmission and evolutionary dynamics across a range of infectious diseases