Research Questions for Validation and Verification in the Context of Model-Based Engineering

International audienceIn model-based engineering (MBE), the abstraction power of models is used to deal with the ever increasing complexity of modern software systems. As models play a central role in MBE-based development processes, for the adoption of MBE in practical projects it becomes indispensable to introduce rigorous methods for ensuring the correctness of the models. Consequently, much effort has been spent on developing and applying validation and verification (V&V) techniques for models. However, there are still many open challenges. In this paper, we shortly review the status quo of V&V techniques in MBE and derive a catalogue of open questions whose answers would contribute to successfully putting MBE into practice

Parallel In-place Model Transformations with LinTra

As software systems have grown large and complex in the last few years, the problems with which Model-Driven Development has to cope have increased at the same pace. In particular, the need to improve the performance and scalability of model transformations has become a critical issue. In previous work we introduced LinTra, a model transformation platform for the parallel execution of out-place model transformations. Nevertheless, in-place model transformations are required in several contexts and domains as well. In this paper we discuss the fundamentals of in-place model transformations in the light of their parallel execution and provide LinTra with an in-place execution mode.Ministerio de Ciencia e Innovación TIN2011-23795Ministerio de Economía y Competitividad TIN2014-52034-REuropean Commission ICT Policy Support Programme 31785

Model Transformation Testing and Debugging: A Survey

Model transformations are the key technique in Model-Driven Engineering (MDE) to manipulate and construct models. As a consequence, the correctness of software systems built with MDE approaches relies mainly on the correctness of model transformations, and thus, detecting and locating bugs in model transformations have been popular research topics in recent years. This surge of work has led to a vast literature on model transformation testing and debugging, which makes it challenging to gain a comprehensive view of the current state of the art. This is an obstacle for newcomers to this topic and MDE practitioners to apply these approaches. This paper presents a survey on testing and debugging model transformations based on the analysis of \nPapers~papers on the topics. We explore the trends, advances, and evolution over the years, bringing together previously disparate streams of work and providing a comprehensive view of these thriving areas. In addition, we present a conceptual framework to understand and categorise the different proposals. Finally, we identify several open research challenges and propose specific action points for the model transformation community.This work is partially supported by the European Commission (FEDER) and Junta de Andalucia under projects APOLO (US-1264651) and EKIPMENT-PLUS (P18-FR-2895), by the Spanish Government (FEDER/Ministerio de Ciencia e Innovación – Agencia Estatal de Investigación) under projects HORATIO (RTI2018-101204-B-C21), COSCA (PGC2018-094905-B-I00) and LOCOSS (PID2020-114615RB-I00), by the Austrian Science Fund (P 28519-N31, P 30525-N31), and by the Austrian Federal Ministry for Digital and Economic Affairs and the National Foundation for Research, Technology and Development (CDG

Automated analysis of feature models: Quo vadis?

Feature models have been used since the 90's to describe software product lines as a way of reusing common parts in a family of software systems. In 2010, a systematic literature review was published summarizing the advances and settling the basis of the area of Automated Analysis of Feature Models (AAFM). From then on, different studies have applied the AAFM in different domains. In this paper, we provide an overview of the evolution of this field since 2010 by performing a systematic mapping study considering 423 primary sources. We found six different variability facets where the AAFM is being applied that define the tendencies: product configuration and derivation; testing and evolution; reverse engineering; multi-model variability-analysis; variability modelling and variability-intensive systems. We also confirmed that there is a lack of industrial evidence in most of the cases. Finally, we present where and when the papers have been published and who are the authors and institutions that are contributing to the field. We observed that the maturity is proven by the increment in the number of journals published along the years as well as the diversity of conferences and workshops where papers are published. We also suggest some synergies with other areas such as cloud or mobile computing among others that can motivate further research in the future.Ministerio de Economía y Competitividad TIN2015-70560-RJunta de Andalucía TIC-186

A Framework for Automatic Dynamic Constraint Verification in Cyber Physical System Modeling Languages

Design of Cyber-Physical Systems (CPSs) involves overlapping the domains of control theory, network communication, and computational algorithms. Involving multiple domains within the same design greatly increases the system complexity. Furthermore, the physical nature of CPSs generally involves important safety constraints where constraint violations can be catastrophic. The design of CPSs benefits from focusing on the construction of abstracted, high-level models in a DomainSpecific Modeling Language (DSML). A Domain-Specific Modeling Environment (DSME) may aid in the design of such complex systems by enforcing structural design constraints during the construction of models. Models built using a DSME may also use compilers or interpreters to produce real working, low-level artifacts that represent the high-level design. Though each model in a DSME may abide by a formal specification, the behavior of a design may violate dynamic constraints if deployed. Engineers are tasked to ensure that models behave safely by implementing their expert knowledge after using appropriate verification tools. Constraint violations may be eliminated by a modification of the model based on verification feedback, known as Dynamic Constraint Feedback (DCF). Mending such constraint violations is a task generally performed by the model designer. Such a process could potentially be automated through the capture of well-known design practices. The challenging task when automating model correction then becomes in the design of a DSML. A designer of a DSML may have a clear understanding of how to design the syntax and semantics for their domain, but there are no formal methods for implementing verification tools for automatic model correction. Such a framework could greatly aid in the selection of available verification tools, implement well-established design methods, and model dynamic constraints. Presented is the Dynamic Constraint Feedback Metamodeling Language (DCFML), a new metamodel to implement DCF upfront in DSML design. This particular solution provides a concrete solution to the abstraction of the various components of DCF, and then appends them to the DSML design process provided by a DSME

LU Factorization Algorithm with Minimum Degree Ordering in Power Distribution Network Problems

Power systems computations for nowadays common large distributed systems typically involve the usage of very large sparse matrices, whose analysis and verification is very time and memory consuming. When blocked, sparse matrices can be processed much more efficiently, and this made blocked sparse matrices widely used in acquiring solutions for power system problems. The established sparse matrix storage and reordering techniques however do not fully utilize the existing computer architecture, thus search for efficient sparse system solution is ongoing. This paper presents adjustments of well-known LU factorization algorithm suitable for use in power distribution network applications. LU factorization algorithm processes data in blocks and uses minimum degree ordering to accelerate the computations

Automatic Bridge between BPMN Models and UML Activity Diagrams based on Graph Transformation

Model Driven Engineering (MDE) provides available tools, concepts and languages to create and transform models. One of the most important successes of MDE is model transformation; it permits transforming models used by one community to equivalent models used by another one. Moreover, each community of developers has its own tools for verification, testing and test case generation. Hence, a developer of one community who moves to work with another community needs a transformation process from the second community to (his/her) own community and vice versa. Therefore, the target community can benefit from the expertise of the source one and the developers do not begin from zero.In this context, we propose in this paper an automatic transformation to create a bridge between the BPMN and UML communities. We propose an approach and a visual tool for the automatic transformation of BPMN models to UML Activity Diagrams (UML-AD). The proposed approach is based on Meta-Modeling and Graph Transformation, and uses the AToM3 tool. Indeed, we were inspired by the OMG meta-models of BPMN and UML-AD and implemented versions of both meta-models using AToM3. This last allows generating automatically a visual modeling tool for each proposed meta-model. Based on these two meta-models, we propose a graph grammar composed of sixty rules that perform the transformation process. The proposed approach is illustrated through three case studies

Power Side Channels in Security ICs: Hardware Countermeasures

Power side-channel attacks are a very effective cryptanalysis technique that can infer secret keys of security ICs by monitoring the power consumption. Since the emergence of practical attacks in the late 90s, they have been a major threat to many cryptographic-equipped devices including smart cards, encrypted FPGA designs, and mobile phones. Designers and manufacturers of cryptographic devices have in response developed various countermeasures for protection. Attacking methods have also evolved to counteract resistant implementations. This paper reviews foundational power analysis attack techniques and examines a variety of hardware design mitigations. The aim is to highlight exposed vulnerabilities in hardware-based countermeasures for future more secure implementations