Analysis and design of sinusoidal quadrature RC-oscillators

Modern telecommunication equipment requires components that operate in many different frequency bands and support multiple communication standards, to cope with the growing demand for higher data rate. Also, a growing number of standards are adopting the use of spectrum efficient digital modulations, such as quadrature amplitude modulation (QAM) and orthogonal frequency division multiplexing (OFDM). These modulation schemes require accurate quadrature oscillators, which makes the quadrature oscillator a key block in modern radio frequency (RF) transceivers. The wide tuning range characteristics of inductorless quadrature oscillators make them natural candidates, despite their higher phase noise, in comparison with LC-oscillators. This thesis presents a detailed study of inductorless sinusoidal quadrature oscillators. Three quadrature oscillators are investigated: the active coupling RC-oscillator, the novel capacitive coupling RCoscillator, and the two-integrator oscillator. The thesis includes a detailed analysis of the Van der Pol oscillator (VDPO). This is used as a base model oscillator for the analysis of the coupled oscillators. Hence, the three oscillators are approximated by the VDPO. From the nonlinear Van der Pol equations, the oscillators’ key parameters are obtained. It is analysed first the case without component mismatches and then the case with mismatches. The research is focused on determining the impact of the components’ mismatches on the oscillator key parameters: frequency, amplitude-, and quadrature-errors. Furthermore, the minimization of the errors by adjusting the circuit parameters is addressed. A novel quadrature RC-oscillator using capacitive coupling is proposed. The advantages of using the capacitive coupling are that it is noiseless, requires a small area, and has low power dissipation. The equations of the oscillation amplitude, frequency, quadrature-error, and amplitude mismatch are derived. The theoretical results are confirmed by simulation and by measurement of two prototypes fabricated in 130 nm standard complementary metal-oxide-semiconductor (CMOS) technology. The measurements reveal that the power increase due to the coupling is marginal, leading to a figure-of-merit of -154.8 dBc/Hz. These results are consistent with the noiseless feature of this coupling and are comparable to those of the best state-of-the-art RC-oscillators, in the GHz range, but with the lowest power consumption (about 9 mW). The results for the three oscillators show that the amplitude- and the quadrature-errors are proportional to the component mismatches and inversely proportional to the coupling strength. Thus, increasing the coupling strength decreases both the amplitude- and quadrature-errors. With proper coupling strength, a quadrature error below 1° and amplitude imbalance below 1% are obtained. Furthermore, the simulations show that increasing the coupling strength reduces the phase noise. Hence, there is no trade-off between phase noise and quadrature error. In the twointegrator oscillator study, it was found that the quadrature error can be eliminated by adjusting the transconductances to compensate the capacitance mismatch. However, to obtain outputs in perfect quadrature one must allow some amplitude error

On the Design of Voltage-Controlled Sinusoidal Oscillators Using OTA's

A unified systematic approach to the design of voltage-controlled oscillators using only operational transconductance amplifiers (OTA's) and capacitors is discussed in this paper. Two classical oscillator models, i.e., quadrature and bandpass-based, are employed to generate several oscillator structures. They are very appropriate for silicon monolithic implementations. The resulting oscillation frequencies are proportional to the transconductance of the OTA and this makes the reported structures well-suited for building voltage controlled oscillators (VCO's). Amplitude stabilization circuits using both automatic gain control (AGC) mechanisms and limitation schemes are presented which are compatible with the transconductance amplifier capacitor oscillator (TACO). Experimental results from bipolar breadboard and CMOS IC prototypes are included showing good potential of OTA-based oscillators for high frequency VCO operation.Comisión Interministerial de Ciencia y Tecnología ME87-000

Simple quadrature oscillator for BIST

A simple quadrature oscillator for the built-in self-test (BIST) of integrated analogue filters is proposed. A new hardware-efficient approach for amplitude control is described, the main assets being: (i) the technique requires little hardware, which makes it very useful for BIST; (ii) the oscillation amplitude is well defined, and (iii) the distortion-level introduced by the amplitude control loop is under the control of the designer

Low power low voltage quadrature RC oscillators for modern RF receivers

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de ComputadoresThis thesis proposes a study of three different RC oscillators, two relaxation and a ring oscillator. All the circuits are implemented using UMC 130 nm CMOS technology with a supply voltage of 1.2 V. We present a wideband MOS current/voltage controlled quadrature oscillator constituted by two multivibrators. Two different forms of coupling named, soft (traditional)and hard (proposed) are differentiated and investigated. It is found that hard coupling reduces the quadrature error and results in a low phase-noise (about 2 dB improvement) with respect to soft coupling. The behaviour of the singular and coupled multivibrators is investigated, when an external synchronizing harmonic is applied. We introduce a new RC relaxation oscillator with pulse self biasing, to reduce power consumption, and with harmonic ltering and resistor feedback, to reduce phase-noise. The designed circuit has a very low phase-noise, -132.6 dBc/Hz @ 10 MHz offset, and the power consumption is only 1 mW, which leads to a gure of merit (FOM) of -159.1 dBc/Hz. The nal circuit is a two integrator fully implemented in CMOS technology, with low power consumption. The respective layout is made and occupies a total area of5.856x10-3 mm2, post-layout simulation is also done

Jitter Limitations on Multi-Carrier Modulation

A feasibility study is made of an OFDM system based on analog multipliers and integrate-and-dump blocks, targeted at Gb/s copper interconnects. The effective amplitude variation of the integrator output caused by jitter is explained in an intuitive way by introducing correlation plots. For a given rms jitter and error rate, high frequency carriers allow for less modulation depth than low frequency carriers. A jitter limit on the total system bit rate is calculated, which is a function of rms jitter, bandwidth, and specified system symbol error rate. It is concluded that, because of the high sensitivity to timing errors inherent in OFDM, traditional PAM systems with equal bandwidth and error rate are more feasible

Microwave oscillator with reduced phase noise by negative feedback incorporating microwave signals with suppressed carrier

Oscillator configurations which reduce the effect of 1/f noise sources for both direct feedback and stabilized local oscillator (STALO) circuits are developed and analyzed. By appropriate use of carrier suppression, a small signal is generated which suffers no loss of loop phase information or signal-to-noise ratio. This small signal can be amplified without degradation by multiplicative amplifier noise, and can be detected without saturation of the detector. Together with recent advances in microwave resonator Qs, these circuit improvements will make possible lower phase noise than can be presently achieved without the use of cryogenic devices

Current-Controlled Current-Mode Quadrature Oscillator Using Translinear Current Conveyors

In this paper, a current-mode quadrature oscillator using second-generation current conveyors (CCIIs) is presented. The proposed oscillator consists of two CCIIs, two grounded capacitors and two grounded resistors. The circuit is suitable for integrated circuit implementation by using grounded capacitors. In addition, a new current-controlled current-mode quadrature oscillator using two current controlled second generation current conveyors (CCCIIs) and two grounded capacitors can be obtained by replacing CCIIs and resistors series at X terminals with CCCIIs. The condition of oscillation and frequency of oscillation can be orthogonally controlled. The frequency of oscillation can be controlled by grounded resistors and external bias currents. The proposed circuits have been simulated by SPICE simulations. The simulation results are confirmed the proposed theory

Log-domain All-pass Filter-based Multiphase Sinusoidal Oscillators

Log-domain current-mode multiphase sinusoidal oscillators based on all-pass filters are presented in this paper. The first-order differential equation is used for obtaining inverting and non-inverting all-pass filters. The proposed oscillators are realized by all-pass filters which can be electronically tuned their natural frequency and stage gain by adjusting the bias currents. Each all pass filter contains 10 NPN transistors and a grounded capacitor. The validated BJT model which used in SPICE simulation operated by a single power supply as low as 2.5 V. The frequency of oscillation can be controlled over four decades. The total harmonic distortions of these MSO at frequency 56.67 MHz and 54.44 MHz, obtained around 0.52% and 0.75%, respectively. The proposed circuits enable fully integrated in telecommunication systems and also suit to high-frequency applications. Nonideality studies and PSpice simulation results are included to confirm the theory