Characterisation & optimisation of computational functional blocks for ATM switches GaAs MESFET technology

Thesis (MESc) -- University of Adelaide, Department of Electrical and Electronic Engineering, 199

Time Driven Priority Router Implementation and First Experiments

This paper reports on the implementation of Time-Driven Priority (TDP) scheduling on a FreeBSD platform. This work is part of a TDP prototyping and demonstration project aimed at showing the implications of TDP deployment in packet-switched networks, especially benefits for real-time applications. This paper focuses on practical aspects related to the implementation of the technology on a Personal Computer (PC)-based router and presents the experimental results obtained on a testbed network. The basic building blocks of a TDP router are described and implementation choices are discussed. The relevant results achieved and here presented can be categorized into two types: qualitative results, including the successful integration of all needed blocks and the insight obtained on the complexity related to the implementation of a TDP router, and quantitative ones, including measures of achievable network utilization and of jitter experienced on a fully-loaded TDP network. The outcome demonstrates the effectiveness of the presented implementation while confirming TDP points of strengt

Design and Implementation of a Multi-Class Network Architecture for Hardware Neural Networks

Die vorliegende Arbeit beschreibt den Entwurf und die Implementierung einer Netzwerkarchitektur, welche Techniken von leitungsvermittelnden und paketvermittelnden Netzwerken verbindet, um zwei verschiedene Dienstgüten anzubieten: isochrone Verbindungen und paketbasierte Verbindungen mit bestmöglicher Zustellung. Isochrone Verbindungen verwenden reservierte Netzwerkresourcen, um eine verlustfreie Übertragung sowie eine niedrige Ende-zu-Ende Verzögerung mit begrenzter Varianz zu garantieren. Die Synchronisierung aller Netzwerkknoten sowie die Berechnung einer kompakten Reservierungsbelegung werden durch effiziente Algorithmen gelöst. Paketbasierte Übertragungen verwenden die verbleibende Bandbreite. Das Multiplexen beider Verkehrsklassen wird von einem neuartigen Bypass-Switch geleistet, der skalierbar ist in der Anzahl der Schnittstellen sowie in der externen Bandbreite und ohne eine interne Beschleunigung auskommt. Die Netzwerkarchitektur kommt in der Forschung innerhalb des FACETS Projektes mit großskaligen künstlichen neuronalen Netzen in Hardware zum Einsatz, für die Vernetzung eines verteilten Systems aus VLSI neuronalen Netzen. Axonale Verbindungen zwischen Neuronen werden mit Hilfe von isochronen Verbindungen modelliert, wohingegen paketbasierte Übertragung die Grundlage für eine systemweite gemeinsame Speicherarchitektur bildet. Der zur Laufzeit ausgeführte Teil des Netzwerkes ist in programmierbarer Logik implementiert und arbeitet mit einer externen Übertragungsrate von 3.125 Gbit/s. Die Arbeit diskutiert die anwendungsbezogenen Anforderungen an das Netzwerk, sowie dessen Entwurf und Referenzimplementierung in programmierbarer Logik und Software. Theoretische Überlegungen über die Leistungsfähigkeit werden durch Messungen und Simulationen verifiziert. Obwohl die Netzwerkarchitektur für die spezielle Anwendung mit neuronalen Netzen entworfen wurde, stellt sie eine generelle Lösung für alle Netzwerkumgebungen dar, welche isochrone Verbindungen und Paketvermittlung mit niedriger Komplexität benötigen. Die Architektur ist insbesondere für den Einsatz in der nächsten Stufe der Hardwareentwicklung des FACETS Projektes zur Vernetzung künstlicher neuronaler Netze auf Wafer-Ebene geeignet

Simulation and analytical performance studies of generic atm switch fabrics.

As technology improves exciting new services such as video phone become possible and economically viable but their deployment is hampered by the inability of the present networks to carry them. The long term vision is to have a single network able to carry all present and future services. Asynchronous Transfer Mode, ATM, is the versatile new packet -based switching and multiplexing technique proposed for the single network. Interest in ATM is currently high as both industrial and academic institutions strive to understand more about the technique. Using both simulation and analysis, this research has investigated how the performance of ATM switches is affected by architectural variations in the switch fabric design and how the stochastic nature of ATM affects the timing of constant bit rate services. As a result the research has contributed new ATM switch performance data, a general purpose ATM switch simulator and analytic models that further research may utilise and has uncovered a significant timing problem of the ATM technique. The thesis will also be of interest and assistance to anyone planning on using simulation as a research tool to model an ATM switch

Future benefits and applications of intelligent on-board processing to VSAT services

The trends and roles of VSAT services in the year 2010 time frame are examined based on an overall network and service model for that period. An estimate of the VSAT traffic is then made and the service and general network requirements are identified. In order to accommodate these traffic needs, four satellite VSAT architectures based on the use of fixed or scanning multibeam antennas in conjunction with IF switching or onboard regeneration and baseband processing are suggested. The performance of each of these architectures is assessed and the key enabling technologies are identified

A Slotted Ring Test Bed for the Study of ATM Network Congestion Management

This thesis addresses issues raised by the proposed Broadband Integrated Services Digital Network which will provide a flexible combination of integrated services traffic through its cell-based Asynchronbus Transport Mode (ATM). The introduction of a cell-based, connection-oriented, transport mode brings with it new technical challenges for network management. The routing of cells, their service at switching centres, and problems of cell congestion not encountered in the existing network, are some of the key issues. The thesis describes the development of a hardware slotted ring testbed for the investigation of congestion management in an ATM network. The testbed is designed to incorporate a modified form of the ORWELL protocol to control media access. The media access protocol is analysed to give a model for maximum throughput and reset interval under various traffic distributions. The results from the models are compared with measurements carried out on the testbed, where cell arrival statistics are also varied. It is shown that the maximum throughput of the testbed is dependent on both traffic distribution and cell arrival statistics. The testbed is used for investigations in a heterogeneous traffic environment where two classes of traffic with different cell arrival statistics and quality of service requirements are defined. The effect of prioritisation, media access protocol, traffic intensity, and traffic source statistics were investigated by determining an Admissible Load Region (ALR) for a network station. Conclusions drawn from this work suggest that there are many problems associated with the reliable definition of an ALR because of the number of variable parameters which could shift the ALR boundary. A suggested direction for further work is to explore bandwidth reservation and the concept of equivalent capacity of a connection, and how this can be linked to source control parameters

A New Scheduling Algorithm for Multimedia Communication

The primary purpose of this work is to propose a new scheduling approach of multimedia data streams in real-time communication and also to study and analyze the various existing scheduling approaches

Time-Driven Access and Forwarding for Industrial Wireless Multihop Networks

The deployment of wireless technologies in industrial networks is very promising mainly due to their inherent flexibility. However, current wireless solutions lack the capability to provide the deterministic, low delay service required by many industrial applications. Moreover, the high level of interference generated by industrial equipment limits the coverage that ensures acceptable performance. Multi-hop solutions, when combining frame forwarding with higher node density, have the potential to provide the needed coverage while keeping radio communication range short. However, in multi-hop solutions the medium access time at each of the nodes traversed additively contributes to the end-to-end delay and the forwarding delay (i.e., the time required for packets to be processed, switched, and queued) at each node is to be added as well. This paper describes Time-driven Access and Forwarding (TAF), a solution for guaranteeing deterministic delay, at both the access and forwarding level, in wireless multi-hop networks, analyzes its properties, and assesses its performance in industrial scenario

Studies and simulations of the DigiCipher system

During this period the development of simulators for the various high definition television (HDTV) systems proposed to the FCC was continued. The FCC has indicated that it wants the various proposers to collaborate on a single system. Based on all available information this system will look very much like the advanced digital television (ADTV) system with major contributions only from the DigiCipher system. The results of our simulations of the DigiCipher system are described. This simulator was tested using test sequences from the MPEG committee. The results are extrapolated to HDTV video sequences. Once again, some caveats are in order. The sequences used for testing the simulator and generating the results are those used for testing the MPEG algorithm. The sequences are of much lower resolution than the HDTV sequences would be, and therefore the extrapolations are not totally accurate. One would expect to get significantly higher compression in terms of bits per pixel with sequences that are of higher resolution. However, the simulator itself is a valid one, and should HDTV sequences become available, they could be used directly with the simulator. A brief overview of the DigiCipher system is given. Some coding results obtained using the simulator are looked at. These results are compared to those obtained using the ADTV system. These results are evaluated in the context of the CCSDS specifications and make some suggestions as to how the DigiCipher system could be implemented in the NASA network. Simulations such as the ones reported can be biased depending on the particular source sequence used. In order to get more complete information about the system one needs to obtain a reasonable set of models which mirror the various kinds of sources encountered during video coding. A set of models which can be used to effectively model the various possible scenarios is provided. As this is somewhat tangential to the other work reported, the results are included as an appendix