Pruned Bit-Reversal Permutations: Mathematical Characterization, Fast Algorithms and Architectures

A mathematical characterization of serially-pruned permutations (SPPs) employed in variable-length permuters and their associated fast pruning algorithms and architectures are proposed. Permuters are used in many signal processing systems for shuffling data and in communication systems as an adjunct to coding for error correction. Typically only a small set of discrete permuter lengths are supported. Serial pruning is a simple technique to alter the length of a permutation to support a wider range of lengths, but results in a serial processing bottleneck. In this paper, parallelizing SPPs is formulated in terms of recursively computing sums involving integer floor and related functions using integer operations, in a fashion analogous to evaluating Dedekind sums. A mathematical treatment for bit-reversal permutations (BRPs) is presented, and closed-form expressions for BRP statistics are derived. It is shown that BRP sequences have weak correlation properties. A new statistic called permutation inliers that characterizes the pruning gap of pruned interleavers is proposed. Using this statistic, a recursive algorithm that computes the minimum inliers count of a pruned BR interleaver (PBRI) in logarithmic time complexity is presented. This algorithm enables parallelizing a serial PBRI algorithm by any desired parallelism factor by computing the pruning gap in lookahead rather than a serial fashion, resulting in significant reduction in interleaving latency and memory overhead. Extensions to 2-D block and stream interleavers, as well as applications to pruned fast Fourier transforms and LTE turbo interleavers, are also presented. Moreover, hardware-efficient architectures for the proposed algorithms are developed. Simulation results demonstrate 3 to 4 orders of magnitude improvement in interleaving time compared to existing approaches.Comment: 31 page

A New Block S-Random Interleaver for Shorter Length Frames for Turbo Codes

In this paper, we have proposed a new design of interleaver based on S-random and block interleaver. The characteristics of both block and S-random interleaver are used by this proposed interleaver.  There is a large influence of free distance in turbo codes due to interleaving as it lowers the error floor. The free distance of turbo codes can be increased by designing interleaver with high spread. In this case, the overall spreading factor is increased significantly for smaller length frames also. The simulations results are compared with full S-random interleavers. The bit error rate performance of proposed interleaver for Turbo codes is much better than full s-random interleaver at the cost of small delay

A New Block S-Random Interleaver for Shorter Length Frames for Turbo Codes

In this paper, we have proposed a new design of interleaver based on S-random and block interleaver. The characteristics of both block and S-random interleaver are used by this proposed interleaver. There is a large influence of free distance in turbo codes due to interleaving as it lowers the error floor. The free distance of turbo codes can be increased by designing interleaver with high spread. In this case, the overall spreading factor is increased significantly for smaller length frames also. The simulations results are compared with full S-random interleavers. The bit error rate performance of proposed interleaver for Turbo codes is much better than full s-random interleaver at the cost of small delay

On chip interconnects for multiprocessor turbo decoding architectures

International audienc

Robust and efficient video/image transmission

The Internet has become a primary medium for information transmission. The unreliability of channel conditions, limited channel bandwidth and explosive growth of information transmission requests, however, hinder its further development. Hence, research on robust and efficient delivery of video/image content is demanding nowadays. Three aspects of this task, error burst correction, efficient rate allocation and random error protection are investigated in this dissertation. A novel technique, called successive packing, is proposed for combating multi-dimensional (M-D) bursts of errors. A new concept of basis interleaving array is introduced. By combining different basis arrays, effective M-D interleaving can be realized. It has been shown that this algorithm can be implemented only once and yet optimal for a set of error bursts having different sizes for a given two-dimensional (2-D) array. To adapt to variable channel conditions, a novel rate allocation technique is proposed for FineGranular Scalability (FGS) coded video, in which real data based rate-distortion modeling is developed, constant quality constraint is adopted and sliding window approach is proposed to adapt to the variable channel conditions. By using the proposed technique, constant quality is realized among frames by solving a set of linear functions. Thus, significant computational simplification is achieved compared with the state-of-the-art techniques. The reduction of the overall distortion is obtained at the same time. To combat the random error during the transmission, an unequal error protection (UEP) method and a robust error-concealment strategy are proposed for scalable coded video bitstreams

Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures

This work proposes a general framework for the design and simulation of network on chip based turbo decoder architectures. Several parameters in the design space are investigated, namely the network topology, the parallelism degree, the rate at which messages are sent by processing nodes over the network and the routing strategy. The main results of this analysis are: i) the most suited topologies to achieve high throughput with a limited complexity overhead are generalized de-Bruijn and generalized Kautz topologies; ii) depending on the throughput requirements different parallelism degrees, message injection rates and routing algorithms can be used to minimize the network area overhead.Comment: submitted to IEEE Trans. on Circuits and Systems I (submission date 27 may 2009

Application of convolutional interleavers in turbo codes with unequal error protection, Journal of Telecommunications and Information Technology, 2006, nr 1

This paper deals with an application of convolu- tional interleavers in unequal error protection (UEP) turbo codes. The constructed convolutional interleavers act as block interleavers by inserting a number of stuff bits into the interleaver memories at the end of each data block. Based on the properties of this interleaver, three different models of UEP turbo codes are suggested. Simulation results confirm that uti- lizing UEP can provide better protection for important parts of each data block, while significantly decreasing the number of stuff bits