3,531 research outputs found

    Network-on-Chip -based Multi-Processor System-on-Chip: Towards Mixed-Criticality System Certification

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    07101 Abstracts Collection -- Quantitative Aspects of Embedded Systems

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    From March 5 to March 9, 2007, the Dagstuhl Seminar 07101 ``Quantitative Aspects of Embedded Systems\u27\u27 was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar as well as abstracts of seminar results and ideas are put together in this paper. The first section describes the seminar topics and goals in general. Links to extended abstracts or full papers are provided, if available

    Framework and Algorithms for Operator-Managed Content Caching

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    We propose a complete framework targeting operator-driven content caching that can be equally applied to both ISP-operated Content Delivery Networks (CDNs) and future Information-Centric Networks (ICNs). In contrast to previous proposals in this area, our solution leverages operators’ control on cache placement and content routing, managing to considerably reduce network operating costs by minimizing the amount of transit traffic and balancing load among available network resources. In addition, our solution provides two key advantages over previous proposals. First, it allows for a simple computation of the optimal cache placement. Second, it provides knobs for operators to fine-tune performance. We validate our design through both analytical modeling and trace-driven simulations and show that our proposed solution achieves on average twice as many cache hits in comparison to previously proposed techniques, without increasing delivery latency. In addition, we show that the proposed framework achieves 19-33% better load balancing across links and caching nodes, being also robust to traffic spikes

    NASA Automated Rendezvous and Capture Review. Executive summary

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    In support of the Cargo Transfer Vehicle (CTV) Definition Studies in FY-92, the Advanced Program Development division of the Office of Space Flight at NASA Headquarters conducted an evaluation and review of the United States capabilities and state-of-the-art in Automated Rendezvous and Capture (AR&C). This review was held in Williamsburg, Virginia on 19-21 Nov. 1991 and included over 120 attendees from U.S. government organizations, industries, and universities. One hundred abstracts were submitted to the organizing committee for consideration. Forty-two were selected for presentation. The review was structured to include five technical sessions. Forty-two papers addressed topics in the five categories below: (1) hardware systems and components; (2) software systems; (3) integrated systems; (4) operations; and (5) supporting infrastructure

    An occupational therapy intervention for residents with stroke related disabilities in UK care homes (OTCH): cluster randomised controlled trial

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    Objective To evaluate the clinical efficacy of an established programme of occupational therapy in maintaining functional activity and reducing further health risks from inactivity in care home residents living with stroke sequelae. Design Pragmatic, parallel group, cluster randomised controlled trial. Setting 228 care homes (>10 beds each), both with and without the provision of nursing care, local to 11 trial administrative centres across the United Kingdom. Participants 1042 care home residents with a history of stroke or transient ischaemic attack, including those with language and cognitive impairments, not receiving end of life care. 114 homes (n=568 residents, 64% from homes providing nursing care) were allocated to the intervention arm and 114 homes (n=474 residents, 65% from homes providing nursing care) to standard care (control arm). Participating care homes were randomised between May 2010 and March 2012. Intervention Targeted three month programme of occupational therapy, delivered by qualified occupational therapists and assistants, involving patient centred goal setting, education of care home staff, and adaptations to the environment. Main outcome measures Primary outcome at the participant level: scores on the Barthel index of activities of daily living at three months post-randomisation. Secondary outcome measures at the participant level: Barthel index scores at six and 12 months post-randomisation, and scores on the Rivermead mobility index, geriatric depression scale-15, and EuroQol EQ-5D-3L questionnaire, at all time points. Results 64% of the participants were women and 93% were white, with a mean age of 82.9 years. Baseline characteristics were similar between groups for all measures, personal characteristics, and diagnostic tests. Overall, 2538 occupational therapy visits were made to 498 participants in the intervention arm (mean 5.1 visits per participant). No adverse events attributable to the intervention were recorded. 162 (11%) died before the primary outcome time point, and 313 (30%) died over the 12 months of the trial. The primary outcome measure did not differ significantly between the treatment arms. The adjusted mean difference in Barthel index score at three months was 0.19 points higher in the intervention arm (95% confidence interval −0.33 to 0.70, P=0.48). Secondary outcome measures also showed no significant differences at all time points. Conclusions This large phase III study provided no evidence of benefit for the provision of a routine occupational therapy service, including staff training, for care home residents living with stroke related disabilities. The established three month individualised course of occupational therapy targeting stroke related disabilities did not have an impact on measures of functional activity, mobility, mood, or health related quality of life, at all observational time points. Providing and targeting ameliorative care in this clinically complex population requires alternative strategies

    Towards a Unified Top-Down Design Flow for Fully-Differential Logic Blocks with Improved Speed and Noise Immunity

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    A new top-down design flow (RTL-to-GDSII) is proposed for achieving high-performance and noiseimmune designs consisting of differential logic blocks. The differential building blocks are based on the currentmode logic (CML), which offers true differentiality with low-swing signalling, switching-independent constant power dissipation and very high-speed operation. The goal of this flow is to allow effective cancellation of inductive and capacitive noise in high-speed on-chip interconnect lines using a simple generic interconnect architecture

    Layout regularity metric as a fast indicator of process variations

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    Integrated circuits design faces increasing challenge as we scale down due to the increase of the effect of sensitivity to process variations. Systematic variations induced by different steps in the lithography process affect both parametric and functional yields of the designs. These variations are known, themselves, to be affected by layout topologies. Design for Manufacturability (DFM) aims at defining techniques that mitigate variations and improve yield. Layout regularity is one of the trending techniques suggested by DFM to mitigate process variations effect. There are several solutions to create regular designs, like restricted design rules and regular fabrics. These regular solutions raised the need for a regularity metric. Metrics in literature are insufficient for different reasons; either because they are qualitative or computationally intensive. Furthermore, there is no study relating either lithography or electrical variations to layout regularity. In this work, layout regularity is studied in details and a new geometrical-based layout regularity metric is derived. This metric is verified against lithographic simulations and shows good correlation. Calculation of the metric takes only few minutes on 1mm x 1mm design, which is considered fast compared to the time taken by simulations. This makes it a good candidate for pre-processing the layout data and selecting certain areas of interest for lithographic simulations for faster throughput. The layout regularity metric is also compared against a model that measures electrical variations due to systematic lithographic variations. The validity of using the regularity metric to flag circuits that have high variability using the developed electrical variations model is shown. The regularity metric results compared to the electrical variability model results show matching percentage that can reach 80%, which means that this metric can be used as a fast indicator of designs more susceptible to lithography and hence electrical variations
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