Algorithms and VLSI architectures for parametric additive synthesis

A parametric additive synthesis approach to sound synthesis is advantageous as it can model sounds in a large scale manner, unlike the classical sinusoidal additive based synthesis paradigms. It is known that a large body of naturally occurring sounds are resonant in character and thus fit the concept well. This thesis is concerned with the computational optimisation of a super class of form ant synthesis which extends the sinusoidal parameters with a spread parameter known as band width. Here a modified formant algorithm is introduced which can be traced back to work done at IRCAM, Paris. When impulse driven, a filter based approach to modelling a formant limits the computational work-load. It is assumed that the filter's coefficients are fixed at initialisation, thus avoiding interpolation which can cause the filter to become chaotic. A filter which is more complex than a second order section is required. Temporal resolution of an impulse generator is achieved by using a two stage polyphase decimator which drives many filterbanks. Each filterbank describes one formant and is composed of sub-elements which allow variation of the formant’s parameters. A resource manager is discussed to overcome the possibility of all sub- banks operating in unison. All filterbanks for one voice are connected in series to the impulse generator and their outputs are summed and scaled accordingly. An explorative study of number systems for DSP algorithms and their architectures is investigated. I invented a new theoretical mechanism for multi-level logic based DSP. Its aims are to reduce the number of transistors and to increase their functionality. A review of synthesis algorithms and VLSI architectures are discussed in a case study between a filter based bit-serial and a CORDIC based sinusoidal generator. They are both of similar size, but the latter is always guaranteed to be stable

Digit-slicing architectures for real-time digital filters

One of the many important algorithmic techniques in digital signal processing is real-time digital filtering. Modular sliced structures for digital filters have been proposed before, but the nature of implementation has been mainly constrained to non-recursive second order digital filters with positive values of coefficients. The aim of this research project is to extend this modular digit slicing concept to more practical higher order digital filters which are recursive and are of many forms (direct, nondirect, canonic, non-canonic). [Continues.

The design and implementation of a microprocessor controlled adaptive filter

This thesis describes the construction and implementation of a microprocessor controlled recursive adaptive filter applied as a noise canceller. It describes the concept of the adaptive noise canceller, a method of estimating the received signal corrupted with additive interference (noise). This canceller has two inputs, the primary input containing the corrupted signal and the reference input consisting of the additive noise correlated in some unknown way to the primary noise. The reference input is filtered and subtracted from the primary input without degrading the desired components of the signal. This filtering process is adaptive and based on Widrow-Hoff Least-Mean-Square algorithm. Adaptive filters are programmable and have the capability to adjust their own parameters in situations where minimum piori knowledge is available about the inputs. For recursive filters, these parameters include feed-forward (non-recursive) as well as feedback (recursive) coefficients. A new design and implementation of the adaptive filter is suggested which uses a high speed 68000 microprocessor to accomplish the coefficients updating operation. Many practical problems arising in the hardware implementation are investigated. Simulation results illustrate the ability of the adaptive noise canceller to have an acceptable performance when the coefficients updating operation is carried out once every N sampling periods. Both simulation and hardware experimental results are in agreement

Concepts in LSI servo-control-electronics

This thesis deals with the engineering aspects of control electronics. It examines modern concepts of servo-control theory in the light of recent developments in the technology of monolithic circuits. Applicational considerations are slanted towards Aerospace standards of reliability and power-consumption economy. Conclusions drawn from the discussion of fabrication constraints and performance requirements lead to a preference for digital implementations. Yield problems on one hand and aging effects on the other greatly reduce the feasibility rating of analog arrays. Current practice in servo-control electronics revolves around purely analog implementations, sampled-data systems and Primitive on-off arrangements. The motivation behind the status quo and the justification of the proposed approach are discussed in detail. The organization of digital systems is examined in order to demonstrate the feasibility of Large Scale Integration (LSI) in servo-control electronics. The questions of hardware versatility and power-dissipation economy are emphasized from technological, economical and applicational standpoints. Self-Contained loops and Computer-Aided systems investigated within the ramifications of a functional division into Detectors, Compensators and Drivers. Differential Frequency Modulation is assumed to effect the information transfer from the Pick-Off coil of the transducer to tie input ports of the Ratemeter. Pulse Width-Frequency Modulation is employed at the Driver-Torquer interface. The operation of the Ratameter conforms with classical logic, except for a slope-independent Level-Crossing-Discriminator (LCD), which is designed to provide a time-resolution gain of 3 db. over conventional frequency detectors. Circuit detais of the LCD are given in order to illustrate differences between integrated and discrete circuit configurations. Two types of compensators are discussed: canonic pole-zero arrangements with ROM multipliers and Kalman fiiters with stored-program implementations of covariance equations. The concept of Pulse-Width-Frequency-Modulation (PWFM) is introduced co reconcile the dynamic-range requirements or servo-control drivers with the time-resolution limitations of power transistors. Simple means of implementation of PWFM are also given; they take the form. of a combination of logic-gates and DDA elements, a technique which could be used to advantage in other applications, especially digital detection and filtration