準ミリ波・ミリ波領域における低位相雑音電圧制御発振器のLC共振器に関する研究

2017岡山県立大学大学

On the VCO/Frequency Divider Interface in Cryogenic CMOS PLL for Quantum Computing Applications

The availability of quantum microprocessors is mandatory, to efficiently run those quantum al-gorithms promising a radical leap forward in computation capability. Silicon-based nanostruc-tured qubits appear today as a very interesting approach, because of their higher information density, longer coherence times, fast operation gates, and compatibility with the actual CMOS technology. In particular, thanks to their phase noise properties, the actual CMOS RFIC Phase-Locked Loops (PLL) and Phase-Locked Oscillators (PLO) are interesting circuits to synthe-size control signals for spintronic qubits. In a quantum microprocessor, these circuits should op-erate close to the qubits, that is, at cryogenic temperatures. The lack of commercial cryogenic Design Kits (DK) may make the interface between the Voltage Controlled Oscillator (VCO) and the Frequency Divider (FD) a serious issue. Nevertheless, currently this issue has not been sys-tematically addressed in the literature. The aim of the present paper is to investigate the VCO/FD interface when the temperature drops from room to cryogenic. To this purpose, physi-cal models of electronics passive/active devices and equivalent circuits of VCO and the FD were developed at room and cryogenic temperatures. The modeling activity has led to design guide-lines for the VCO/FD interface, useful in the absence of cryogenic DKs

CIRCUIT MODULES FOR SIX-PORT REFLECTOMETER ON CHIP

Broadband signal generator is an indispensable module for broadband Six-Port Reflectometer (SPR). To integrate a whole SPR system on a chip, the source must be compact. In this thesis, a three-stage voltage-controlled oscillator (VCO), using two parallel weak invertor-chain oscillators and sense amplifiers, is proposed and designed in a 0.13 µm CMOS process. These two parallel weak inverter-chain oscillators extend the low frequency operating range and the sense amplifiers expand the high frequency operation. The measurement results show that the oscillator can be tuned from 430 MHz to 12 GHz, which satisfies the targeted SPR operating frequency range. In order to expand the operating frequency band of the SPR, an introduction of the tuning mechanisms is necessary. Inductors and capacitors are the two basic components for the circuit modules of an SPR. Varactors are provided by process vendors. In this thesis, a novel differential active inductor is proposed and implemented in a 0.13 µm CMOS process. The measured self-resonance frequency is 6 GHz, which is the highest self-resonance frequency published thus far for a differential inductor. The proposed structure is further improved by adding a symmetrical negative resistor. Post layout shows a 10 GHz self-resonance frequency. A power divider is a common module in the SPR and microwave circuits. A new lumped-element power divider structure, which presents the strongest tolerance to parasitic resistors in capacitors and inductors, is proposed and analyzed in this thesis by even- and odd-mode method. Varactors and the above-mentioned active inductors are used to build the proposed power divider. The circuit is designed in 0.13 µm CMOS technology with a core area of 300 µm_265 µm. Post layout simulation yields a tuning range from 1 GHz to 7.5 GHz

High-Performance Multi-Antenna Wireless for 5G and Beyond

Over the next decade, multi-antenna radios, including phased array and multiple-input-multiple-output (MIMO) radios, are expected to play an essential role in the next-generation of wireless networks. Phased arrays can reject spatial interferences and provide coherent beamforming gain, and MIMO technology promises to significantly enhance the system performance in the coverage, capacity, and user data rate through the beamforming or diversity/capacity gain which can substantially increase the range in wireless links, that are challenged from the transmitter (TX) power handling, receiver (RX) noise perspectives and a multi-path environment. Furthermore, the multi-user MIMO (MU-MIMO) can simultaneously serve multiple users which is vital for femtocell base stations and access points (AP). Full-duplex (FD) wireless, namely simultaneous transmission and reception at the same frequency, is an emerging technology that has gained attention due to its potential to double the data throughput, as well as provide other benefits in the higher layers such as better spectral efficiency, reducing network and feedback signaling delays, and resolving hidden-node problems to avoid collisions. However, several challenges remain in the quest for the high-performance integrated FD radios. Transmitter power handling remains an open problem, particularly in FD radios that integrate a shared antenna interface. Secondly, FD operation must be achieved across antenna VSWR variations and a changing EM environment. Finally, FD must be extended to multi-antenna radios, including phased array and multi-input multi-output (MIMO) radios, as over the next decade, they are expected to play an essential role in the next generation of wireless networks. Multi-antenna FD operation, however, is challenged not only by the self-interference (SI) from each TX to its own RX but also cross-talk SI (CT-SI) between antennas. In this dissertation, first, a full-duplex phased array circulator-RX (circ.-RX) is proposed that achieves self-interference cancellation (SIC) through repurposing beamforming degrees of freedom (DoF) on TX and RX. Then, an FD MIMO circ.-RX is proposed that achieves SI and CT-SI cancellation (CT-SIC) through passive RF and shared-delay baseband (BB) canceller that addresses challenges associated with FD MIMO operation. Wireless radios at millimeter-wave (mm-wave) frequencies enable the high-speed link for portable devices due to the wide-band spectrum available. Large-scale arrays are required to compensate for high path loss to form an mm-wave link. Mm-wave MIMO systems with digitization enable virtual arrays for radar, digital beamforming (DBF) for high mobility scenarios and spatial multiplexing. To preserve MIMO information, the received signal from each element in MIMO RX should be transported to ADC/DSP IC for DBF, and vice versa on the TX side. A large-scale array can be formed by tiling multiple mm-wave IC front-ends, and thus, a single-wire interface is desired between DSP IC and mm-wave ICs to reduce board routing complexity. Per-element digitization poses the challenge of handling high data-rate I/O in large-scale tiled MIMO mm-wave arrays. SERializer – DESerializer (SERDES) is traditionally being used as a high-speed link in computing systems and networks. However, SERDES results in a large area and power consumption. In this dissertation, a 60~GHz 4-element MIMO TX with a single-wire interface is presented that de-multiplexes the baseband signal of all elements and LO reference that are frequency-domain multiplexed on a single-wire coax cable

Characterization of process variability and robust optimization of analog circuits

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 161-174).Continuous scaling of CMOS technology has enabled dramatic performance enhancement of CMOS devices and has provided speed, power, and density improvement in both digital and analog circuits. CMOS millimeter-wave applications operating at more than 50GHz frequencies has become viable in sub-100nm CMOS technologies, providing advantages in cost and high density integration compared to other heterogeneous technologies such as SiGe and III-V compound semiconductors. However, as the operating frequency of CMOS circuits increases, it becomes more difficult to obtain sufficiently wide operating ranges for robust operation in essential analog building blocks such as voltage-controlled oscillators (VCOs) and frequency dividers. The fluctuations of circuit parameters caused by the random and systematic variations in key manufacturing steps become more significant in nano-scale technologies. The process variation of circuit performance is quickly becoming one of the main concerns in high performance analog design. In this thesis, we show design and analysis of a VCO and frequency divider operating beyond 70GHz in a 65nm SOI CMOS technology. The VCO and frequency divider employ design techniques enlarging frequency operating ranges to improve the robustness of circuit operation. Circuit performance is measured from a number of die samples to identify the statistical properties of performance variation. A back-propagation of variation (BPV) scheme based on sensitivity analysis of circuit performance is proposed to extract critical circuit parameter variation using statistical measurement results of the frequency divider. We analyze functional failure caused by performance variability, and propose dynamic and static optimization methods to improve parametric yield. An external bias control is utilized to dynamically tune the divider operating range and to compensate for performance variation. A novel time delay model of a differential CML buffer is proposed to functionally approximate the maximum operating frequency of the frequency divider, which dramatically reduces computational cost of parametric yield estimation. The functional approximation enables the optimization of the VCO and frequency divider parametric yield with a reasonable amount of simulation time.by Daihyun Lim.Ph.D

Compact Models for Integrated Circuit Design

This modern treatise on compact models for circuit computer-aided design (CAD) presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models. Featuring exercise problems at the end of each chapter and extensive references at the end of the book, the text supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices. It ensures even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts

Conception et réalisation de fonctions millimétriques en technologie BiCMOS 55nm

In the past few years, the feasibility of high performance millimeter-wave(mmWave) fully-integrated transceivers has been widely demonstrated in both CMOS andBiCMOS silicon technologies. Nowadays, automatic level control (ALC) solutions and in-situtesting (BIT: Built in Testing) and characterization of mmWave components, constitute themajor research interest in mmWave domain. This work focus on the development of the mainbuilding blocks (power detectors and baluns) that meet the requirement of the today’smmWave ALC and BIT applications. The developed prototypes take advantage of the highperformances transistors offered by the BiCMOS 55 nm technology, from STMicroelectronics, aswell as the high performances of the slow-wave based passive components developed by theIMEP-LAHC laboratory. Several prototypes were developed as a proof of concept for thedesignated applications. This work helps future generation millimeter-wave systems to havefaster development and better robustness.Au cours des dernières années, la faisabilité des émetteurs-récepteurs millimétriques entièrement intégrés a été largement démontrée en technologies silicium CMOS et BiCMOS. Deux axes sont actuellement très porteurs dans ce domaine : (1) l’amélioration des performances à travers des boucles d’asservissement intégrées (ALC : Automatique Level Control), (2) le développement de solutions de caractérisation sur silicium des composants millimétriques (BIT : Built In Test). L’objectif principal de cette thèse est de développer les blocsde base (détecteurs de puissance et baluns) pour répondre aux besoins actuels des applications ALC et BIT. Les circuits réalisés combinent l’avantage de composants actifs de la technologie BiCMOS 55 nm, de STMicroelectronics, avec l’avantage des structures passives à ondes lentes développées à l’IMEP-LAHC. Ce travail permet un développement plus rapide et robuste pour la future génération de systèmes millimétriques

Conception et réalisation de fonctions millimétriques en technologie BiCMOS 55nm

In the past few years, the feasibility of high performance millimeter-wave(mmWave) fully-integrated transceivers has been widely demonstrated in both CMOS andBiCMOS silicon technologies. Nowadays, automatic level control (ALC) solutions and in-situtesting (BIT: Built in Testing) and characterization of mmWave components, constitute themajor research interest in mmWave domain. This work focus on the development of the mainbuilding blocks (power detectors and baluns) that meet the requirement of the today’smmWave ALC and BIT applications. The developed prototypes take advantage of the highperformances transistors offered by the BiCMOS 55 nm technology, from STMicroelectronics, aswell as the high performances of the slow-wave based passive components developed by theIMEP-LAHC laboratory. Several prototypes were developed as a proof of concept for thedesignated applications. This work helps future generation millimeter-wave systems to havefaster development and better robustness.Au cours des dernières années, la faisabilité des émetteurs-récepteurs millimétriques entièrement intégrés a été largement démontrée en technologies silicium CMOS et BiCMOS. Deux axes sont actuellement très porteurs dans ce domaine : (1) l’amélioration des performances à travers des boucles d’asservissement intégrées (ALC : Automatique Level Control), (2) le développement de solutions de caractérisation sur silicium des composants millimétriques (BIT : Built In Test). L’objectif principal de cette thèse est de développer les blocsde base (détecteurs de puissance et baluns) pour répondre aux besoins actuels des applications ALC et BIT. Les circuits réalisés combinent l’avantage de composants actifs de la technologie BiCMOS 55 nm, de STMicroelectronics, avec l’avantage des structures passives à ondes lentes développées à l’IMEP-LAHC. Ce travail permet un développement plus rapide et robuste pour la future génération de systèmes millimétriques

From RF-Microsystem Technology to RF-Nanotechnology

The RF microsystem technology is believed to introduce a paradigm switch in the wireless revolution. Although only few companies are to date doing successful business with RF-MEMS, and on a case-by-case basis, important issues need yet to be addressed in order to maximize yield and performance stability and hence, outperform alternative competitive technologies (e.g. ferroelectric, SoS, SOI,…). Namely the behavior instability associated to: 1) internal stresses of the free standing thin layers (metal and/or dielectric) and 2) the mechanical contact degradation, be it ohmic or capacitive, which may occur due to low forces, on small areas, and while handling severe current densities.The investigation and understanding of these complex scenario, has been the core of theoretical and experimental investigations carried out in the framework of the research activity that will be presented here. The reported results encompass activities which go from coupled physics (multiphysics) modeling, to the development of experimental platforms intended to tackles the underlying physics of failure. Several original findings on RF-MEMS reliability in particular with respect to the major failure mechanisms such as dielectric charging, metal contact degradation and thermal induced phenomena have been obtained. The original use of advanced experimental setup (surface scanning microscopy, light interferometer profilometry) has allowed the definition of innovative methodology capable to isolate and separately tackle the different degradation phenomena under arbitrary working conditions. This has finally permitted on the one hand to shed some light on possible optimization (e.g. packaging) conditions, and on the other to explore the limits of microsystem technology down to the nanoscale. At nanoscale indeed many phenomena take place and can be exploited to either enhance conventional functionalities and performances (e.g. miniaturization, speed or frequency) or introduce new ones (e.g. ballistic transport). At nanoscale, moreover, many phenomena exhibit their most interesting properties in the RF spectrum (e.g. micromechanical resonances). Owing to the fact that today’s minimum manufacturable features have sizes comparable with the fundamental technological limits (e.g. surface roughness, metal grain size, …), the next generation of smart systems requires a switching paradigm on how new miniaturized components are conceived and fabricated. In fact endowed by superior electrical and mechanical performances, novel nanostructured materials (e.g. carbon based, as carbon nanotube (CNT) and graphene) may provide an answer to this endeavor. Extensively studied in the DC and in the optical range, the studies engaged in LAAS have been among the first to target microwave and millimiterwave transport properties in carbon-based material paving the way toward RF nanodevices. Preliminary modeling study performed on original test structures have highlighted the possibility to implement novel functionalities such as the coupling between the electromagnetic (RF) and microelectromechanical energy in vibrating CNT (toward the nanoradio) or the high speed detection based on ballistic transport in graphene three-terminal junction (TTJ). At the same time these study have contributed to identify the several challenges still laying ahead such as the development of adequate design and modeling tools (ballistic/diffusive, multiphysics and large scale factor) and practical implementation issues such as the effects of material quality and graphene-metal contact on the electrical transport. These subjects are the focus of presently on-going and future research activities and may represent a cornerstone of future wireless applications from microwave up to the THz range

Air Traffic Management Abbreviation Compendium

As in all fields of work, an unmanageable number of abbreviations are used today in aviation for terms, definitions, commands, standards and technical descriptions. This applies in general to the areas of aeronautical communication, navigation and surveillance, cockpit and air traffic control working positions, passenger and cargo transport, and all other areas of flight planning, organization and guidance. In addition, many abbreviations are used more than once or have different meanings in different languages. In order to obtain an overview of the most common abbreviations used in air traffic management, organizations like EUROCONTROL, FAA, DWD and DLR have published lists of abbreviations in the past, which have also been enclosed in this document. In addition, abbreviations from some larger international projects related to aviation have been included to provide users with a directory as complete as possible. This means that the second edition of the Air Traffic Management Abbreviation Compendium includes now around 16,500 abbreviations and acronyms from the field of aviation