25 research outputs found

    Development of digital predistorters for broadband power amplifiers in OFDM systems using the simplicial canonical piecewise linear function

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    Power amplifiers (PAs) are inherently nonlinear devices. Linearity of a PA can be achieved by backing off the PA to its linear region at the expense of power efficiency loss. For signals with high envelope fluctuation such OFDM system, large backoff is required, causing significant loss in power efficiency. Thus, backoff is not a favourable solution. Digital predistorters (PDs) are widely employed for linearizing PAs that are driven to the nonlinear regions. In broadband systems where PAs exhibit memory effects, the PDs are also required to compensate the memory effects. This thesis deals with the development of digital PDs for broadband PAs in OFDM systems using the Simplicial Canonical Piecewise Linear (SCPWL) function. The SCPWL function offers a few advantages over polynomial models. It imposes a saturation after the last breakpoint, making it suitable for modelling nonlinearities of PA and PD. The breakpoints of the function can be freely placed to allow optimum fitting of a given nonlinearity. It is suitable for modeling strong nonlinearities. Analysis of the SCPWL spectra property shows that the function models infinite order of intermodulation distortion, even with small number of breakpoints. The accuracy of the model can be improved by increasing the number of breakpoints. The original real-valued SCPWL function is extended to include memory structure and complex-valued coefficients, resulting in the proposed baseband SCPWL model with memory. The model is adopted in the development of the Hammerstein-SCPWL PD and memory-SCPWL PD. Vector projection methods are developed for static SCPWL PDs identification. Adaptive algorithms employing the indirect and direct learning architectures are developed for identifying the Hammerstein-SCPWL PD and memory-SCPWL PD. By exploiting the properties of the SCPWL function, the algorithms are simplified. A modified Wiener model estimator is employed to circumvent the non-convex cost function problem of block models. This further reduces the complexity of the Hammerstein PD algorithms. The thesis also analyses the effects of measurement noise on indirect learning SCPWL filter. Due to its linear basis function, the SCPWL filter coefficients do not suffer the coefficient bias effects which are observed in polynomial models. The performance of the proposed SCPWL PDs are compared with state-of-the-art polynomial-based PDs by simulations and measurements

    Design of analog predistorter

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    Abstract. In this thesis, two analog predistorter circuits are designed for linearizing the CMOS power amplifier in MIMO transceivers. The first circuit uses two parallel transistors as conventional derivative superposition, where derivatives of the transistor drain currents are biased to have opposite phases for 3rd-order distortion components. This results in the cancellation and thus providing a very linear 3rd-order response. The other design, using complementary derivative superposition topology, has p- and n-type transistors with a common drain self-biasing to achieve expansive power gain. This is used to improve the 1-dB compression point of the CMOS power amplifier. Simulation results of conventional derivative superposition circuit show over 25 dB improvement in distortion level, while still providing a fair amount of power gain. Implementation with a CMOS power amplifier shows a 2.6 dB improvement in 1 dB compression point. With the circuit having expansive characteristics, adjustable gain-expansion behaviour is achieved. With the implemented digital bias control, expansion between 2.5 dB and 4 dB is achieved, with gain variation between -2.4 dB and 1 dB. With a CMOS power amplifier, 3.5 dB improvement in 1 dB compression point is achieved, allowing the power amplifier to be used with greater efficiency. Both circuits are implemented using 22nm CMOS SOI technology and submitted to fabrication

    Digital predistortion of RF amplifiers using baseband injection for mobile broadband communications

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    Radio frequency (RF) power amplifiers (PAs) represent the most challenging design parts of wireless transmitters. In order to be more energy efficient, PAs should operate in nonlinear region where they produce distortion that significantly degrades the quality of signal at transmitter’s output. With the aim of reducing this distortion and improve signal quality, digital predistortion (DPD) techniques are widely used. This work focuses on improving the performances of DPDs in modern, next-generation wireless transmitters. A new adaptive DPD based on an iterative injection approach is developed and experimentally verified using a 4G signal. The signal performances at transmitter output are notably improved, while the proposed DPD does not require large digital signal processing memory resources and computational complexity. Moreover, the injection-based DPD theory is extended to be applicable in concurrent dual-band wireless transmitters. A cross-modulation problem specific to concurrent dual-band transmitters is investigated in detail and novel DPD based on simultaneous injection of intermodulation and cross-modulation distortion products is proposed. In order to mitigate distortion compensation limit phenomena and memory effects in highly nonlinear RF PAs, this DPD is further extended and complete generalised DPD system for concurrent dual-band transmitters is developed. It is clearly proved in experiments that the proposed predistorter remarkably improves the in-band and out-of-band performances of both signals. Furthermore, it does not depend on frequency separation between frequency bands and has significantly lower complexity in comparison with previously reported concurrent dual-band DPDs

    A fast engineering approach to high efficiency power amplifier linearization for avionics applications

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    This PhD thesis provides a fast engineering approach to the design of digital predistortion (DPD) linearizers from several perspectives: i) enhancing the off-line training performance of open-loop DPD, ii) providing robustness and reducing the computational complexity of the parameters identification subsystem and, iii) importing machine learning techniques to favor the automatic tuning of power amplifiers (PAs) and DPD linearizers with several free-parameters to maximize power efficiency while meeting the linearity specifications. One of the essential parts of unmanned aerial vehicles (UAV) is the avionics, being the radio control one of the earliest avionics present in the UAV. Unlike the control signal, for transferring user data (such as images, video, etc.) real-time from the drone to the ground station, large transmission rates are required. The PA is a key element in the transmitter chain to guarantee the data transmission (video, photo, etc.) over a long range from the ground station. The more linear output power, the better the coverage or alternatively, with the same coverage, better SNR allows the use of high-order modulation schemes and thus higher transmission rates are achieved. In the context of UAV wireless communications, the power consumption, size and weight of the payload is of significant importance. Therefore, the PA design has to take into account the compromise among bandwidth, output power, linearity and power efficiency (very critical in battery-supplied devices). The PA can be designed to maximize its power efficiency or its linearity, but not both. Therefore, a way to deal with this inherent trade-off is to design high efficient amplification topologies and let the PA linearizers take care of the linearity requirements. Among the linearizers, DPD linearization is the preferred solution to both academia and industry, for its high flexibility and linearization performance. In order to save as many computational and power resources as possible, the implementation of an open-loop DPD results a very attractive solution for UAV applications. This thesis contributes to the PA linearization, especially on off-line training for open-loop DPD, by presenting two different methods for reducing the design and operating costs of an open-loop DPD, based on the analysis of the DPD function. The first method focuses on the input domain analysis, proposing mesh-selecting (MeS) methods to accurately select the proper samples for a computationally efficient DPD parameter estimation. Focusing in the MeS method with better performance, the memory I-Q MeS method is combined with feature extraction dimensionality reduction technique to allow a computational complexity reduction in the identification subsystem by a factor of 65, in comparison to using the classical QR-LS solver and consecutive samples selection. In addition, the memory I-Q MeS method has been proved to be of crucial interest when training artificial neural networks (ANN) for DPD purposes, by significantly reducing the ANN training time. The second method involves the use of machine learning techniques in the DPD design procedure to enlarge the capacity of the DPD algorithm when considering a high number of free parameters to tune. On the one hand, the adaLIPO global optimization algorithm is used to find the best parameter configuration of a generalized memory polynomial behavioral model for DPD. On the other hand, a methodology to conduct a global optimization search is proposed to find the optimum values of a set of key circuit and system level parameters, that properly combined with DPD linearization and crest factor reduction techniques, can exploit at best dual-input PAs in terms of maximizing power efficiency along wide bandwidths while being compliant with the linearity specifications. The advantages of these proposed techniques have been validated through experimental tests and the obtained results are analyzed and discussed along this thesis.Aquesta tesi doctoral proporciona unes pautes per al disseny de linealitzadors basats en predistorsió digital (DPD) des de diverses perspectives: i) millorar el rendiment del DPD en llaç obert, ii) proporcionar robustesa i reduir la complexitat computacional del subsistema d'identificació de paràmetres i, iii) incorporació de tècniques d'aprenentatge automàtic per afavorir l'auto-ajustament d'amplificadors de potència (PAs) i linealitzadors DPD amb diversos graus de llibertat per poder maximitzar l’eficiència energètica i al mateix temps acomplir amb les especificacions de linealitat. Una de les parts essencials dels vehicles aeris no tripulats (UAV) _es l’aviònica, sent el radiocontrol un dels primers sistemes presents als UAV. Per transferir dades d'usuari (com ara imatges, vídeo, etc.) en temps real des del dron a l’estació terrestre, es requereixen taxes de transmissió grans. El PA _es un element clau de la cadena del transmissor per poder garantir la transmissió de dades a grans distàncies de l’estació terrestre. A major potència de sortida, més cobertura o, alternativament, amb la mateixa cobertura, millor relació senyal-soroll (SNR) la qual cosa permet l’ús d'esquemes de modulació d'ordres superiors i, per tant, aconseguir velocitats de transmissió més altes. En el context de les comunicacions sense fils en UAVs, el consum de potència, la mida i el pes de la càrrega útil són de vital importància. Per tant, el disseny del PA ha de tenir en compte el compromís entre ample de banda, potència de sortida, linealitat i eficiència energètica (molt crític en dispositius alimentats amb bateries). El PA es pot dissenyar per maximitzar la seva eficiència energètica o la seva linealitat, però no totes dues. Per tant, per afrontar aquest compromís s'utilitzen topologies amplificadores d'alta eficiència i es deixa que el linealitzador s'encarregui de garantir els nivells necessaris de linealitat. Entre els linealitzadors, la linealització DPD és la solució preferida tant per al món acadèmic com per a la indústria, per la seva alta flexibilitat i rendiment. Per tal d'estalviar tant recursos computacionals com consum de potència, la implementació d'un DPD en lla_c obert resulta una solució molt atractiva per a les aplicacions UAV. Aquesta tesi contribueix a la linealització del PA, especialment a l'entrenament fora de línia de linealitzadors DPD en llaç obert, presentant dos mètodes diferents per reduir el cost computacional i augmentar la fiabilitat dels DPDs en llaç obert. El primer mètode se centra en l’anàlisi de l’estadística del senyal d'entrada, proposant mètodes de selecció de malla (MeS) per seleccionar les mostres més significatives per a una estimació computacionalment eficient dels paràmetres del DPD. El mètode proposat IQ MeS amb memòria es pot combinar amb tècniques de reducció del model del DPD i d'aquesta manera poder aconseguir una reducció de la complexitat computacional en el subsistema d’identificació per un factor de 65, en comparació amb l’ús de l'algoritme clàssic QR-LS i selecció de mostres d'entrenament consecutives. El segon mètode consisteix en l’ús de tècniques d'aprenentatge automàtic pel disseny del DPD quan es considera un gran nombre de graus de llibertat (paràmetres) per sintonitzar. D'una banda, l'algorisme d’optimització global adaLIPO s'utilitza per trobar la millor configuració de paràmetres d'un model polinomial amb memòria generalitzat per a DPD. D'altra banda, es proposa una estratègia per l’optimització global d'un conjunt de paràmetres clau per al disseny a nivell de circuit i sistema, que combinats amb linealització DPD i les tècniques de reducció del factor de cresta, poden maximitzar l’eficiència de PAs d'entrada dual de gran ample de banda, alhora que compleixen les especificacions de linealitat. Els avantatges d'aquestes tècniques proposades s'han validat mitjançant proves experimentals i els resultats obtinguts s'analitzen i es discuteixen al llarg d'aquesta tesi

    OFDM based air interfaces for future mobile satellite systems

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    This thesis considers the performance of OFDM in a non-linear satellite channel and mechanisms for overcoming the degradations resulting from the high PAPR in the OFDM signal in the specific satellite architecture. It was motivated by new S-DMB applications but its results are applicable to any OFDM system via satellites. Despite many advantages of OFDM, higher PAPR is a major drawback. OFDM signals are therefore very sensitive to non-linear distortion introduced by the power amplifiers and thus, significantly reduce the power efficiency of the system, which is already crucial to satellite system economics. Simple power amplifier back-off to cope with high OFDM PAPR is not possible. Two transmitter based techniques have been considered: PAPR reduction and amplifier linearization.EThOS - Electronic Theses Online ServiceGBUnited Kingdo

    Power Efficiency Enhancement and Linearization Techniques for Power Amplifiers in Wireless Communications

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    Wireless communication systems require Power Amplifiers (PAs) for signal transmissions. The trade-off between power efficiency and nonlinear distortion in PAs degrades the communication performance. Thus, power efficiency and nonlinearity are two main concerns of operating PAs in communication systems. Nonlinear behavioral models are typically used to quantify and mitigate the distortion effects of PAs on communication systems. This dissertation presents an estimation approach for modeling and linearizing the PA Amplitude-to-Amplitude (AM/AM) nonlinearity using the design specifications of PAs, such as gain, the third-order intercept point, and 1dB compression point. Furthermore, an enhanced approach for modeling solid-state power amplifiers is developed by modifying the Saleh empirical model. The Envelope Tracking (ET) technique for PAs has been a popular power efficiency enhancement in modern cellular systems. However, the time-varying effects of the supply voltage impacts the PA linearity. Therefore, an accurate behavioral model for PA with ET has become an important research effort to characterize the effect of dynamic supply voltage on both the amplitude and phase nonlinearities. Furthermore, the empirical models of ET PAs are widely used to improve PAs linearity by using Digital Predistortion (DPD). This dissertation develops an extended modeling approach to characterize the AM/AM and Amplitude-to-Phase (AM/PM) conversions as well as account for the impact of the time-varying supply voltage on the ET PAs. Memory effects, due to energy storage elements (e.g. capacitors and inductors) in ET PA circuits in addition to the temperature variation of integrated circuit, are modeled using digital filters (finite impulse-response filters) in series with the static AM/AM and static AM/PM nonlinearities. A least-squares approach is mathematically derived for estimating the model coefficients of ET PAs. The model identification of many coefficients requires high computational cost in Float Point Operations (FLOPS), such as multipliers and adders. In addition, the computational cost in FLOPs of a complex number is equivalent to (2-6) times the cost of real numbers. The estimation complexity of the ET PAs model in this work requires around half the number of FLOPS compared to the state-of-the-art behavioral models. This is because the modeling approach in this work consists of real coefficients and a lower number of model parameters. A DPD model is derived in this dissertation to compensate for both the AM/AM and AM/PM nonlinear distortions in ET PAs. A dual-input single-output function architecture is calculated for the DPD model to compensate for the nonlinearities in the AM/AM and AM/PM conversions contributed by the time-varying supply voltage in the ET system. Both the proposed AM/AM and AM/PM DPD models exhibit lower numbers of coefficients, which result in reduction of the identification complexity compared to the state-of-the-art DPD models. The proposed behavioral models of the ET PA and DPD are both evaluated in the time and frequency domains, as well as compared to the state-of-the-art models in terms of model accuracy and estimation complexity

    Digital Front-End Signal Processing with Widely-Linear Signal Models in Radio Devices

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    Necessitated by the demand for ever higher data rates, modern communications waveforms have increasingly wider bandwidths and higher signal dynamics. Furthermore, radio devices are expected to transmit and receive a growing number of different waveforms from cellular networks, wireless local area networks, wireless personal area networks, positioning and navigation systems, as well as broadcast systems. On the other hand, commercial wireless devices are expected to be cheap, be relatively small in size, and have a long battery life. The demands for flexibility and higher data rates on one hand, and the constraints on production cost, device size, and energy efficiency on the other, pose difficult challenges on the design and implementation of future radio transceivers. Under these diametric constraints, in order to keep the overall implementation cost and size feasible, the use of simplified radio architectures and relatively low-cost radio electronics are necessary. This notion is even more relevant for multiple antenna systems, where each antenna has a dedicated radio front-end. The combination of simplified radio front-ends and low-cost electronics implies that various nonidealities in the remaining analog radio frequency (RF) modules, stemming from unavoidable physical limitations and material variations of the used electronics, are expected to play a critical role in these devices. Instead of tightening the specifications and tolerances of the analog circuits themselves, a more cost-effective solution in many cases is to compensate for these nonidealities in the digital domain. This line of research has been gaining increasing interest in the last 10-15 years, and is also the main topic area of this work. The direct-conversion radio principle is the current and future choice for building low-cost but flexible, multi-standard radio transmitters and receivers. The direct-conversion radio, while simple in structure and integrable on a single chip, suffers from several performance degrading circuit impairments, which have historically prevented its use in wideband, high-rate, and multi-user systems. In the last 15 years, with advances in integrated circuit technologies and digital signal processing, the direct-conversion principle has started gaining popularity. Still, however, much work is needed to fully realize the potential of the direct-conversion principle. This thesis deals with the analysis and digital mitigation of the implementation nonidealities of direct-conversion transmitters and receivers. The contributions can be divided into three parts. First, techniques are proposed for the joint estimation and predistortion of in-phase/quadrature-phase (I/Q) imbalance, power amplifier (PA) nonlinearity, and local oscillator (LO) leakage in wideband direct-conversion transmitters. Second, methods are developed for estimation and compensation of I/Q imbalance in wideband direct-conversion receivers, based on second-order statistics of the received communication waveforms. Third, these second-order statistics are analyzed for second-order stationary and cyclostationary signals under several other system impairments related to circuit implementation and the radio channel. This analysis brings new insights on I/Q imbalances and their compensation using the proposed algorithms. The proposed algorithms utilize complex-valued signal processing throughout, and naturally assume a widely-linear form, where both the signal and its complex-conjugate are filtered and then summed. The compensation processing is situated in the digital front-end of the transceiver, as the last step before digital-to-analog conversion in transmitters, or in receivers, as the first step after analog-to-digital conversion. The compensation techniques proposed herein have several common, unique, attributes: they are designed for the compensation of frequency-dependent impairments, which is seen critical for future wideband systems; they require no dedicated training data for learning; the estimators are computationally efficient, relying on simple signal models, gradient-like learning rules, and solving sets of linear equations; they can be applied in any transceiver type that utilizes the direct-conversion principle, whether single-user or multi-user, or single-carrier or multi-carrier; they are modulation, waveform, and standard independent; they can also be applied in multi-antenna transceivers to each antenna subsystem separately. Therefore, the proposed techniques provide practical and effective solutions to real-life circuit implementation problems of modern communications transceivers. Altogether, considering the algorithm developments with the extensive experimental results performed to verify their functionality, this thesis builds strong confidence that low-complexity digital compensation of analog circuit impairments is indeed applicable and efficient
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