Programmable photonics : an opportunity for an accessible large-volume PIC ecosystem

We look at the opportunities presented by the new concepts of generic programmable photonic integrated circuits (PIC) to deploy photonics on a larger scale. Programmable PICs consist of waveguide meshes of tunable couplers and phase shifters that can be reconfigured in software to define diverse functions and arbitrary connectivity between the input and output ports. Off-the-shelf programmable PICs can dramatically shorten the development time and deployment costs of new photonic products, as they bypass the design-fabrication cycle of a custom PIC. These chips, which actually consist of an entire technology stack of photonics, electronics packaging and software, can potentially be manufactured cheaper and in larger volumes than application-specific PICs. We look into the technology requirements of these generic programmable PICs and discuss the economy of scale. Finally, we make a qualitative analysis of the possible application spaces where generic programmable PICs can play an enabling role, especially to companies who do not have an in-depth background in PIC technology

Materials for high-density electronic packaging and interconnection

Electronic packaging and interconnections are the elements that today limit the ultimate performance of advanced electronic systems. Materials in use today and those becoming available are critically examined to ascertain what actions are needed for U.S. industry to compete favorably in the world market for advanced electronics. Materials and processes are discussed in terms of the final properties achievable and systems design compatibility. Weak points in the domestic industrial capability, including technical, industrial philosophy, and political, are identified. Recommendations are presented for actions that could help U.S. industry regain its former leadership position in advanced semiconductor systems production

Design of Discrete-time Chaos-Based Systems for Hardware Security Applications

Security of systems has become a major concern with the advent of technology. Researchers are proposing new security solutions every day in order to meet the area, power and performance specifications of the systems. The additional circuit required for security purposes can consume significant area and power. This work proposes a solution which utilizes discrete-time chaos-based logic gates to build a system which addresses multiple hardware security issues. The nonlinear dynamics of chaotic maps is leveraged to build a system that mitigates IC counterfeiting, IP piracy, overbuilding, disables hardware Trojan insertion and enables authentication of connecting devices (such as IoT and mobile). Chaos-based systems are also used to generate pseudo-random numbers for cryptographic applications.The chaotic map is the building block for the design of discrete-time chaos-based oscillator. The analog output of the oscillator is converted to digital value using a comparator in order to build logic gates. The logic gate is reconfigurable since different parameters in the circuit topology can be altered to implement multiple Boolean functions using the same system. The tuning parameters are control input, bifurcation parameter, iteration number and threshold voltage of the comparator. The proposed system is a hybrid between standard CMOS logic gates and reconfigurable chaos-based logic gates where original gates are replaced by chaos-based gates. The system works in two modes: logic locking and authentication. In logic locking mode, the goal is to ensure that the system achieves logic obfuscation in order to mitigate IC counterfeiting. The secret key for logic locking is made up of the tuning parameters of the chaotic oscillator. Each gate has 10-bit key which ensures that the key space is large which exponentially increases the computational complexity of any attack. In authentication mode, the aim of the system is to provide authentication of devices so that adversaries cannot connect to devices to learn confidential information. Chaos-based computing system is susceptible to process variation which can be leveraged to build a chaos-based PUF. The proposed system demonstrates near ideal PUF characteristics which means systems with large number of primary outputs can be used for authenticating devices

An Integrated BiCMOS driver chip for medium power applications

The development of an integrated driver circuit intended for medium power switching applications is presented. The device contains, on one chip, CMOS digital control logic and bipolar drivers, with BiCMOS interface between the two technologies. The custom integrated circuit includes four outputs each capable of switching over 500 mA at 30 volts, at a frequency of up to 1 MHz. The development effort includes the design of the chip with its component circuits and cells. Standard cell CMOS logic gates along with drive and interface circuits were designed and characterized. An appropriate BiCMOS process was developed which utilizes an n-well based 4-micron polysilicon gate MOS technology and vertical NPNs with subcollector and double emitter implants. The chip performance specifications are evaluated with respect to technology requirements and device characteristics, and trade-offs in the design of the chip and the process are examined. Process and device modeling results are compared with the measured data, which show that the objectives of the design are successfully met for the various applications involving resistive, capacitive, and inductive loads

Study of the impact of lithography techniques and the current fabrication processes on the design rules of tridimensional fabrication technologies

Working for the photolithography tool manufacturer leader sometimes gives me the impression of how complex and specific is the sector I am working on. This master thesis topic came with the goal of getting the overall picture of the state-of-the-art: stepping out and trying to get a helicopter view usually helps to understand where a process is in the productive chain, or what other firms and markets are doing to continue improvingUniversidad de sevilla.Máster Universitario en Microelectrónica: Diseño y Aplicaciones de Sistemas Micro/Nanométrico

A study of the foundry industry dynamics/

Thesis (S.M.)--Massachusetts Institute of Technology, Sloan School of Management, 2010.Cataloged from PDF version of thesis.Includes bibliographical references (p. 76-79).In the process of industrial evolution, it is a general tendency that companies which specialize in a specific value chain have emerged. These companies should construct a business eco-system based on their own platform to compete successfully with vertically integrated companies and other specialized companies. They continue to sustain their competitive advantage only when they share their ability to create value with other eco-system partners. The thesis analyzes the dynamics of the foundry industry. Through the top-down approach (how the semiconductor industry trends have influenced the foundry industry), the foundry market size is expected to grow continuously as the semiconductor industry becomes more horizontal due to exponential increase in IC manufacturing/design cost and focusing strategy on design or manufacturing capabilities. In addition, the bottom-up approach (how companies in the foundry industry compete with each other) indicated that previous key success factors such as time to market, economies of scale and learning curve effect are not necessary conditions any more in this industry. Rather, the success of a foundry company is mainly driven by successful management of eco-system partners based on leading process platform. However, sustainability of platform leadership in the foundry industry can always be threaten by continuous innovation in a technology driven industry, hold-up problem with eco-system partners and change of regulations. These factors are expected to make the foundry industry extremely dynamic despite first mover advantages.by Sang Jin Oh.S.M

The 2021 flexible and printed electronics roadmap

This roadmap includes the perspectives and visions of leading researchers in the key areas of flexible and printable electronics. The covered topics are broadly organized by the device technologies (sections 1–9), fabrication techniques (sections 10–12), and design and modeling approaches (sections 13 and 14) essential to the future development of new applications leveraging flexible electronics (FE). The interdisciplinary nature of this field involves everything from fundamental scientific discoveries to engineering challenges; from design and synthesis of new materials via novel device design to modelling and digital manufacturing of integrated systems. As such, this roadmap aims to serve as a resource on the current status and future challenges in the areas covered by the roadmap and to highlight the breadth and wide-ranging opportunities made available by FE technologies

Novel Materials and Devices for Terahertz Detection and Emission for Sensing, Imaging and Communication

Technical advancement is required to attain a high data transmission rate, which entails expanding beyond the currently available bandwidth and establishing a new standard for the highest data rates, which mandates a higher frequency range and larger bandwidth. The THz spectrum (0.1-10 THz) has been considered as an emerging next frontier for the future 5G and beyond technology. THz frequencies also offer unique characteristics, such as penetrating most dielectric materials like fabric, plastic, and leather, making them appealing for imaging and sensing applications. Therefore, employing a high-power room temperature, tunable THz emitters, and a high responsivity THz detector is essential. Dyakonov-theory Shur\u27s was applied in this dissertation to achieve tunable THz detection and emission by plasma waves in high carrier density channels of field-effect devices. The first major contribution of this dissertation is developing graphene-based THz plasmonics detector with high responsivity. An upside-down free-standing graphene in a field effect transistor based resonant room temperature THz detector device with significantly improved mobility and gate control has been presented. The highest achieved responsivity is ~3.1kV/W, which is more than 10 times higher than any THz detector reported till now. The active region is predominantly single-layer graphene with multi-grains, even though the fabricated graphene THz detector has the highest responsivity. The challenges encountered during the fabrication and measurement of the graphene-based detector have been described, along with a strategy to overcome them while preserving high graphene mobility. In our new design, a monolayer of hBN underneath the graphene layer has been deposited to increase the mobility and electron concentration rate further. We also investigated the diamond-based FETs for their potential characteristics as a THz emitters and detectors. Diamond\u27s wide bandgap, high breakdown field, and high thermal conductivity attributes make it a potential semiconductor material for high voltage, high power, and high-temperature operation. Diamond is a good choice for THz and sub-THz applications because of its high optical phonon scattering and high momentum relaxation time. Numerical and analytical studies of diamond materials, including p-diamond and n-diamond materials, are presented, indicating their effectiveness as a prospective contender for high temperature and high power-based terahertz applications These detectors are expected to be a strong competitor for future THz on-chip applications due to their high sensitivity, low noise, tunability, compact size, mobility, faster response time, room temperature operation, and lower cost. Furthermore, when plasma wave instabilities are induced with the proper biasing, the same devices can be employed as THz emitters, which are expected to have a higher emission power. Another key contribution is developing a method for detecting counterfeit, damaged, forged, or defective ICs has been devised utilizing a new non-destructive and unobtrusive terahertz testing approach to address the crucial point of hardware cybersecurity and system reliability. The response of MMICs, VLSI, and ULSIC to incident terahertz and sub-terahertz radiation at the circuit pins are measured and analyzed using deep learning. More sophisticated terahertz response profiles and signatures of specific ICs can be created by measuring a more significant number of pins under different frequencies, polarizations, and depth of focus. The proposed method has no effect on ICs operation and could provide precise ICs signatures. The classification process between the secure and unsecure ICs images has been explained using data augmentation and transfer learning-based convolution neural network with ~98% accuracy. A planar nanomatryoshka type core-shell resonator with hybrid toroidal moments is shown both experimentally and analytically, allowing unique characteristics to be explored. This resonator may be utilized for accurate sensing, immunobiosensing, quick switching, narrow-band filters, and other applications