4,775 research outputs found
Quantum transport through MoS constrictions defined by photodoping
We present a device scheme to explore mesoscopic transport through molybdenum
disulfide (MoS) constrictions using photodoping. The devices are based on
van-der-Waals heterostructures where few-layer MoS flakes are partially
encapsulated by hexagonal boron nitride (hBN) and covered by a few-layer
graphene flake to fabricate electrical contacts. Since the as-fabricated
devices are insulating at low temperatures, we use photo-induced remote doping
in the hBN substrate to create free charge carriers in the MoS layer. On
top of the device, we place additional metal structures, which define the shape
of the constriction and act as shadow masks during photodoping of the
underlying MoS/hBN heterostructure. Low temperature two- and four-terminal
transport measurements show evidence of quantum confinement effects.Comment: 9 pages, 6 figure
Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines
Large-capacity Content Addressable Memory (CAM) is a key element in a wide
variety of applications. The inevitable complexities of scaling MOS transistors
introduce a major challenge in the realization of such systems. Convergence of
disparate technologies, which are compatible with CMOS processing, may allow
extension of Moore's Law for a few more years. This paper provides a new
approach towards the design and modeling of Memristor (Memory resistor) based
Content Addressable Memory (MCAM) using a combination of memristor MOS devices
to form the core of a memory/compare logic cell that forms the building block
of the CAM architecture. The non-volatile characteristic and the nanoscale
geometry together with compatibility of the memristor with CMOS processing
technology increases the packing density, provides for new approaches towards
power management through disabling CAM blocks without loss of stored data,
reduces power dissipation, and has scope for speed improvement as the
technology matures.Comment: 10 pages, 11 figure
RTS amplitudes in decananometer MOSFETs: 3-D simulation study
In this paper we study the amplitudes of random telegraph signals (RTS) associated with the trapping of a single electron in defect states at the Si/SiO/sub 2/ interface of sub-100-nm (decananometer) MOSFETs employing three-dimensional (3-D) "atomistic" simulations. Both continuous doping charge and random discrete dopants in the active region of the MOSFETs are considered in the simulations. The dependence of the RTS amplitudes on the position of the trapped charge in the channel and on device design parameters such as dimensions, oxide thickness and channel doping concentration is studied in detail. The 3-D simulations offer a natural explanation for the large variation in the RTS amplitudes measured experimentally in otherwise identical MOSFETs. The random discrete dopant simulations result in RTS amplitudes several times higher compared to continuous charge simulations. They also produce closer to the experimentally observed distributions of the RTS amplitudes. The results highlight the significant impact of single charge trapping in the next generation decananometer MOSFETs
Oxidation of gallium arsenide in a plasma multipole device. Study of the MOS structures obtained
The oxygen plasma oxidation of GaAs was studied in order to obtain extremely high frequency responses with MOS devices. In the multipole system a homogeneous oxygen plasma of high density can easily be obtained in a large volume. This system is thus convenient for the study of plasma oxidation of GaAs. The electrical properties of the MOS diodes obtained in this way are controlled by interface states, located mostly in the upper half of the band gap where densities in the 10 to the 13th power/(sq cm) (eV) range can be estimated. Despite these interface states the possibility of fabricating MOSFET transistors working mostly in the depletion mode for a higher frequency cut-off still exists
Electron Mobility and Magneto Transport Study of Ultra-Thin Channel Double-Gate Si MOSFETs
We report on detailed room temperature and low temperature transport
properties of double-gate Si MOSFETs with the Si well thickness in the range
7-17 nm. The devices were fabricated on silicon-on-insulator wafers utilizing
wafer bonding, which enabled us to use heavily doped metallic back gate. We
observe mobility enhancement effects at symmetric gate bias at room
temperature, which is the finger print of the volume inversion/accumulation
effect. An asymmetry in the mobility is detected at 300 K and at 1.6 K between
the top and back interfaces of the Si well, which is interpreted to arise from
different surface roughnesses of the interfaces. Low temperature peak
mobilities of the reported devices scale monotonically with Si well thickness
and the maximum low temperature mobility was 1.9 m2/Vs, which was measured from
a 16.5 nm thick device. In the magneto transport data we observe single and two
sub-band Landau level filling factor behavior depending on the well thickness
and gate biasing
Engineering study for a mass memory system for advanced spacecrafts Final report, 1 Dec. 1969 - 1 Jul. 1970
Mass memory system for advanced spacecraf
Increase in the random dopant induced threshold fluctuations and lowering in sub-100 nm MOSFETs due to quantum effects: a 3-D density-gradient simulation study
In this paper, we present a detailed simulation study of the influence of quantum mechanical effects in the inversion layer on random dopant induced threshold voltage fluctuations and lowering in sub-100 mn MOSFETs. The simulations have been performed using a three-dimensional (3-D) implementation of the density gradient (DG) formalism incorporated in our established 3-D atomistic simulation approach. This results in a self-consistent 3-D quantum mechanical picture, which implies not only the vertical inversion layer quantization but also the lateral confinement effects related to current filamentation in the “valleys” of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical dopant fluctuations, is an increase in both threshold voltage fluctuations and lowering. At the same time, the random dopant induced threshold voltage lowering partially compensates for the quantum mechanical threshold voltage shift in aggressively scaled MOSFETs with ultrathin gate oxides
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