3,516 research outputs found

    Technology library modeling for information-driven circuit synthesis

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    Due to weaknesses in circuit synthesis methods used in todaypsilas CAD tools, the opportunities created by modern microelectronic technology cannot effectively be exploited. This paper considers major issues and requirements of circuit synthesis for the nano CMOS technologies, and discusses our new information-driven circuit synthesis technology that satisfies these requirements. It focuses on an adequate technology library modelling for information-driven circuit synthesis. The new circuit synthesis technology considerably differs from all other known synthesis methods and overcomes their main weaknesses. The experimental results demonstrate that it is able to produce very fast, compact and low-power circuits

    Decomposition and encoding of finite state machines for FPGA implementation

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    Multiple-Valued Index Generation Functions: Reduction of Variables by Linear Transformation

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    We consider incompletely specified multiple-valued input index generation functions f : D → {1, 2, . . . , k}, where D ⊆ P n and P = {0, 1, 2, . . . , p − 1}. In such functions, the number of variables to represent f can be often reduced. Let k be the number of elements in D. We show that most functions can be represented with 2 log p (k + 1) or fewer variables, when k is sufficiently smaller than p n . Also, to further reduce the number of variables, we use linear transformations. To find good linear transformations, we introduce the imbalance measure and the ambiguity measure. A heuristic algorithm to reduce the number of variables by linear transformation is presented. Experimental results using randomly generated functions and lists of English words are shown

    CP-nets: A Tool for Representing and Reasoning withConditional Ceteris Paribus Preference Statements

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    Information about user preferences plays a key role in automated decision making. In many domains it is desirable to assess such preferences in a qualitative rather than quantitative way. In this paper, we propose a qualitative graphical representation of preferences that reflects conditional dependence and independence of preference statements under a ceteris paribus (all else being equal) interpretation. Such a representation is often compact and arguably quite natural in many circumstances. We provide a formal semantics for this model, and describe how the structure of the network can be exploited in several inference tasks, such as determining whether one outcome dominates (is preferred to) another, ordering a set outcomes according to the preference relation, and constructing the best outcome subject to available evidence

    Non-constructive interval simulation of dynamic systems

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    Canonical multi-valued input Reed-Muller trees and forms

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    There is recently an increased interest in logic synthesis using EXOR gates. The paper introduces the fundamental concept of Orthogonal Expansion, which generalizes the ring form of the Shannon expansion to the logic with multiple-valued (mv) inputs. Based on this concept we are able to define a family of canonical tree circuits. Such circuits can be considered for binary and multiple-valued input cases. They can be multi-level (trees and DAG's) or flattened to two-level AND-EXOR circuits. Input decoders similar to those used in Sum of Products (SOP) PLA's are used in realizations of multiple-valued input functions. In the case of the binary logic the family of flattened AND-EXOR circuits includes several forms discussed by Davio and Green. For the case of the logic with multiple-valued inputs, the family of the flattened mv AND-EXOR circuits includes three expansions known from literature and two new expansions

    Quantum Algorithms for Unate and Binate Covering Problems with Application to Finite State Machine Minimization

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    Covering problems find applications in many areas of computer science and engineering, such that numerous combinatorial problems can be formulated as covering problems. Combinatorial optimization problems are generally NPhard problems that require an extensive search to find the optimal solution. Exploiting the benefits of quantum computing, we present a quantum oracle design for covering problems, taking advantage of Grover’s search algorithm to achieve quadratic speedup. This paper also discusses applications of the quantum counter in unate covering problems and binate covering problems with some important practical applications, such as finding prime implicants of a Boolean function, implication graphs, and minimization of incompletely specified Finite State Machines
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