Voltage to frequency converter Patent

Voltage controlled, variable frequency relaxation oscillator with MOSFET variable current fee

Nanowire Zinc Oxide MOSFET Pressure Sensor

Fabrication and characterization of a new kind of pressure sensor using self-assembly Zinc Oxide (ZnO) nanowires on top of the gate of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is presented. Self-assembly ZnO nanowires were fabricated with a diameter of 80 nm and 800 nm height (80:8 aspect ratio) on top of the gate of the MOSFET. The sensor showed a 110% response in the drain current due to pressure, even with the expected piezoresistive response of the silicon device removed from the measurement. The pressure sensor was fabricated through low temperature bottom up ultrahigh aspect ratio ZnO nanowire growth using anodic alumina oxide (AAO) templates. The pressure sensor has two main components: MOSFET and ZnO nanowires. Silicon Dioxide growth, photolithography, dopant diffusion, and aluminum metallization were used to fabricate a basic MOSFET. In the other hand, a combination of aluminum anodization, alumina barrier layer removal, ZnO atomic layer deposition (ALD), and wet etching for nanowire release were optimized to fabricate the sensor on a silicon wafer. The ZnO nanowire fabrication sequence presented is at low temperature making it compatible with CMOS technology

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current

DCCII-Based Novel Lossless Grounded Inductance Simulators With No Element Matching Constrains

In 1996, the differential current conveyor (DCCII) was introduced as a versatile active element with current differencing capability. Therefore, in this study, the usefulness of the DCCII is shown on six novel lossless grounded inductance simulator circuits. Proposed circuits simultaneously employ minimum number of elements, i.e. single DCCII, one capacitor, and two resistors. No passive element matching restriction is needed and all solutions are electronically tunable in case that one of resistors is replaced by MOSFET-based voltage-controlled resistor. The internal structure of the active element has been implemented using the TSMC 0.25 um SCN025 CMOS process BSIM3v3.1 parameters. Firstly, the performance of the selected inductor simulator is evaluated and subsequently verified in the design of 5th-order high-pass ladder and 2nd-order frequency filters. In addition, experimental results using commercially available AD844/ADs are given to verify the theoretical analysis and SPICE simulations

On the design of ultra low voltage CMOS oscillators.

Wireless sensor nodes require very tight power budgets to operate from either asmall battery, some energy harvesting mechanism or both. In many cases, thermalor electrochemical harvesting devices provide very low voltages of the order of100 mV or even lower. Time-keeping functionality is required in IoT systems andthe time-keeping module must be on at all times. Crystal oscillators have provento be useful for low power time-keeping applications, and in this context supplyvoltage lowering is a convenient strategy. Therefore, 32 kHz crystal oscillatorsoperating with only 60 mV supply are presented. Two implementations based ona Schmitt trigger circuit for two different crystals were designed and experimentallycharacterized.These crystal oscillators are based on the application of a Schmitt trigger asan amplifier. Guidelines for designing this block to be the amplifier of a crystaloscillator are provided. Furthermore, a dynamic model of the Schmitt trigger isproposed and the model results are compared against simulations. The amplifierswere experimentally characterized, providing a gain of 2.48 V/V with a 60 mVpower supply. As it was intended in the design stage, for voltages above 100 mVhysteresis appears and the Schmitt trigger starts operating as a comparator.The Schmitt triggers to operate as amplifiers of the crystal oscillators aredesigned in a 130 nm CMOS process, requiring an area of 45μm x 74μm and78μm x 83μm, respectively. The power consumptions of the crystal oscillators are2.26 nW and 15 nW and the temperature stabilities attained are 62 ppm (25-62°C)and 50 ppm (5-62°C), respectively. The dependence on the supply voltage of thecurrent consumption, fractional frequency, start-up time and oscillation amplitudewere measured. The Allan deviation is 30 ppb for both oscillators.On the other hand, an LC voltage controlled oscillator (VCO) is designed in28 nm FD-SOI for RF applications. The possibility of modeling the transistors inthe 28 nm FD-SOI technology by means of the all inversion region long channelbulk transistor model used for the Schmitt trigger circuits, is studied. A cross-coupled nMOS architecture is used to build the VCO. The theoretical limit for theminimum supply voltage that enables oscillation is studied. The transistors wereoptimally sized to aim the minimum power consumption through a low-voltageapproach and the performance of the VCO was obtained through simulations. Los nodos sensores inalámbricos tienen fuertes requerimientos de bajo consumo demanera de operar con baterías pequeñas o algún mecanismo de cosecha de energía, o ambos. En muchos casos, la cosecha de energía térmica o electroquímica provee tensiones muy bajas del orden de 100 mV o incluso menos. Los sistemas de internet de las cosas incluyen un módulo de reloj que debe estar siempre encendido a efectos de contar el tiempo. Los osciladores a cristal son probadamente ́utiles como relojes de bajo consumo, y en este contexto la reducción de la tensión es una estrategia conveniente. Por lo tanto, presentamos osciladores a cristal de 32 kHz operando con sólo 60 mV de tensión de alimentación. Dos implementaciones, basadas en el circuito Schmitt trigger para dos cristales diferentes, se diseñan y caracterizan experimentalmente.Estos osciladores a cristal están basados en la aplicación del Schmitt trigger como amplificador. Se provee una guía para el diseño de este bloque para funcionar como el amplificador de un oscilador a cristal. Adicionalmente se propone un modelo dinámico del Schmitt trigger y los resultados del modelo son comparados con resultados de simulación. Los amplificadores son caracterizados experimentalmente, proveyendo una ganancia de 2.48 V/V con 60 mV de tensión de alimentación. Tal como se pretende en la etapa de diseño, para tensiones mayores a 100 mV aparece el fenómeno de histéresis y el Schmitt trigger comienza a operarcomo un comparador.Los Schmitt trigger para operar como amplificadores de los osciladores a cristal son diseñados en un proceso CMOS de 130 nm y ocupan un área de 45μm x 74μmy 78μm x 83μm, respectivamente. El consumo de potencia de sendos osciladores es2.26 nW y 15 nW y la estabilidad en temperatura obtenida es de 62 ppm (25-62°C)y 50 ppm (5-62°C), respectivamente. Se midieron la dependencia del consumo de corriente con respecto a la tensión de alimentación, la frequencia de oscilación, eltiempo de arranque y la amplitud de oscilación. La desviación de Allan es 30 ppben ambos osciladores.Por otra parte, un oscilador LC controlado por voltaje es diseñado en un proceso CMOS de silicio sobre aislante en deplexión total de 28 nm, para aplicaciones de radiofrecuencia. Se estudia la posibilidad de utilizar en este caso el mismo modelo utilizado para el diseño del Schmitt trigger. Dicho modelo es válido en todas las regiones de inversión y está desarrollado para transistores de tipo sustrato y de canal largo. La arquitectura de transistores nMOS entrelazados es la utilizada para este oscilador. Se estudia el límite teórico para la mínima tensión de alimentación. Los transistores son dimensionados de manera óptima para obtener el mínimo consumo de potencia posible, utilizando un enfoque de baja tensión y el desempeño del oscilador se obtuvo mediante simulaciones

On the design of ultra low voltage CMOS oscillators

Los nodos sensores inalámbricos tienen fuertes requerimientos de bajo consumo de manera de operar con baterías pequeñas o algún mecanismo de cosecha de energía, o ambos. En muchos casos, la cosecha de energía térmica o electroquímica provee tensiones muy bajas del orden de 100 mV o incluso menos. Los sistemas de internet de las cosas incluyen un módulo de reloj que debe estar siempre encendido a efectos de contar el tiempo. Los osciladores a cristal son probadamente útiles como relojes de bajo consumo, y en este contexto la reducción de la tensión es una estrategia conveniente. Por lo tanto, presentamos osciladores a cristal de 32 kHz operando con sólo 60 mV de tensión de alimentación. Dos implementaciones, basadas en el circuito Schmitt trigger para dos cristales diferentes, se diseñan y caracterizan experimentalmente. Estos osciladores a cristal están basados en la aplicación del Schmitt trigger como amplificador. Se provee una guía para el diseño de este bloque para funcionar como el amplificador de un oscilador a cristal. Adicionalmente se propone un modelo dinámico del Schmitt trigger y los resultados del modelo son comparados con resultados de simulación. Los amplificadores son caracterizados experimentalmente, proveyendo una ganancia de 2.48 V/V con 60 mV de tensión de alimentación. Tal como se pretende en la etapa de diseño, para tensiones mayores a 100 mV aparece el fenómeno de histéresis y el Schmitt trigger comienza a operar como un comparador. Los Schmitt trigger para operar como amplificadores de los osciladores a cristal son diseñados en un proceso CMOS de 130 nm y ocupan un área de 45 um x 74 um y 78 um x 83 um, respectivamente. El consumo de potencia de sendos osciladores es 2.26 nW y 15 nW y la estabilidad en temperatura obtenida es de 62 ppm (25-62°C) y 50 ppm (5-62°C), respectivamente. Se midieron la dependencia del consumo de corriente con respecto a la tensión de alimentación, la frequencia de oscilación, el tiempo de arranque y la amplitud de oscilación. La desviación de Allan es 30 ppb en ambos osciladores. Por otra parte, un oscilador LC controlado por voltaje es diseñado en un proceso CMOS de silicio sobre aislante en deplexión total de 28 nm, para aplicaciones de radiofrecuencia. Se estudia la posibilidad de utilizar en este caso el mismo modelo utilizado para el diseño del Schmitt trigger. Dicho modelo es válido en todas las regiones de inversión y está desarrollado para transistores de tipo sustrato y de canal largo. La arquitectura de transistores nMOS entrelazados es la utilizada para este oscilador. Se estudia el límite teórico para la mínima tensión de alimentación. Los transistores son dimensionados de manera óptima para obtener el mínimo consumo de potencia posible, utilizando un enfoque de baja tensión y el desempeño del oscilador se obtuvo mediante simulaciones.Agencia Nacional de Investigación e InnovaciónComisión Académica de Posgrado. Universidad de la RepúblicaComisión Sectorial de Investigación Científica. Universidad de la Repúblic

Modelling for optimisation of self-powered wireless sensor nodes

Accepted versio

System-on-Package Low-Power Telemetry and Signal Conditioning unit for Biomedical Applications

Recent advancements in healthcare monitoring equipments and wireless communication technologies have led to the integration of specialized medical technology with the pervasive wireless networks. Intensive research has been focused on the development of medical wireless networks (MWN) for telemedicine and smart home care services. Wireless technology also shows potential promises in surgical applications. Unlike conventional surgery, an expert surgeon can perform the surgery from a remote location using robot manipulators and monitor the status of the real surgery through wireless communication link. To provide this service each surgical tool must be facilitated with smart electronics to accrue data and transmit the data successfully to the monitoring unit through wireless network. To avoid unwieldy wires between the smart surgical tool and monitoring units and to reap the benefit of excellent features of wireless technology, each smart surgical tool must incorporate a low-power wireless transmitter. Low-power transmitter with high efficiency is essential for short range wireless communication. Unlike conventional transmitters used for cellular communication, injection-locked transmitter shows greater promises in short range wireless communication. The core block of an injection-locked transmitter is an injection-locked oscillator. Therefore, this research work is directed towards the development of a low-voltage low-power injection-locked oscillator which will facilitate the development of a low-power injection-locked transmitter for MWN applications. Structure of oscillator and types of injection are two crucial design criteria for low-power injection-locked oscillator design. Compared to other injection structures, body-level injection offers low-voltage and low-power operation. Again, conventional NMOS/PMOS-only cross-coupled LC oscillator can work with low supply voltage but the power consumption is relatively high. To overcome this problem, a self-cascode LC oscillator structure has been used which provides both low-voltage and low-power operation. Body terminal coupling is used with this structure to achieve injection-locking. Simulation results show that the self-cascode structure consumes much less power compared to that of the conventional structure for the same output swing while exhibiting better phase noise performance. Usage of PMOS devices and body bias control not only reduces the flicker noise and power consumption but also eliminates the requirements of expensive fabrication process for body terminal access

The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique

This thesis presents the analysis, implementation and testing of a circuit-level radiation hardened-by-design (RHBD) technique first presented in [1]. Radiation effects heavily influence the cost and design of electronics bound for radiation-rich environments such as in nuclear reactors or space. The circuit-level RHBD technique is presented as a cost-effective way to mitigate total-ionizing dose (TID) radiation in digital complementary metal-oxide-semiconductor (CMOS) transistor circuits. These claims are analyzed and experimentally tested. Devices from a relatively old and a newer semiconductor fabrication process are tested to investigate the impact of device scaling on the RHBD technique’s effectiveness. A rad-tolerant frequency synthesizer that implements this technique is discussed. Challenges in the project included implementing efficient testing procedures at the radiation test facilities. Testing time was limited and in-situ­ test methodologies utilizing LabView programs were used effectively