The Fifth NASA Symposium on VLSI Design

The fifth annual NASA Symposium on VLSI Design had 13 sessions including Radiation Effects, Architectures, Mixed Signal, Design Techniques, Fault Testing, Synthesis, Signal Processing, and other Featured Presentations. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The presentations share insights into next generation advances that will serve as a basis for future VLSI design

Static Compaction of Test Sequences for Synchronous Sequential Circuits

Today, VLSI design has progressed to a stage where it needs to incorporate methods of testing circuits. The Automatic Test Pattern Generation (ATPG) is a very attractive method and feasible on almost any combinational and sequential circuit. Currently available automatic test pattern generators (ATPGs) generate test sets that may be excessively long. Because a cost of testing depends on the test length. compaction techniques have been used to reduce that length. The motivation for studying test compaction is twofold. Firstly, by reducing the test sequence length. the memory requirements during the test application and the test application time are reduced. Secondly, the extent of test compaction possible for deterministic test sequences indicates that test pattern generators spend a significant amount of time generating test vectors that are not necessary. The compacted test sequences provide a target for more efficient deterministic test generators. Two types of compaction techniques exist: dynamic and static. The dynamic test sequence compaction performs compaction concurrently with the test generation process and often requires modification of the test generator. The static test sequence compaction is done in a post-processing step to the test generation and is independent of the test generation algorithm and process. In the thesis, a new idea for static compaction of test sequences for synchronous sequential circuits has been proposed. Our new method - SUSEM (Set Up Sequence Elimination Method) uses the circuit state information to eliminate some setup sequences for the target faults and consequently reduce the test sequence length. The technique has been used for the test sequences generated by HITEC test generator. ISCAS89 benchmark circuits were used in our experiments, for some circuits which have a large number of target faults and relatively small number of flip-flops, the very significant compactions have been obtained. The more important is that this method can be used to improve the test generation procedure unlike most static compaction methods which blindly or randomly remove parts of test vectors and cannot be used to improve the test generators

Voyager Spacecraft Phase B, Task D. Annex to Volume 4 - Spacecraft Electrical Subsystems Definition Final Report

Systems analysis and tradeoff data on electrical subsystems for recommended Voyager spacecraft configuratio

The 1991 3rd NASA Symposium on VLSI Design

Papers from the symposium are presented from the following sessions: (1) featured presentations 1; (2) very large scale integration (VLSI) circuit design; (3) VLSI architecture 1; (4) featured presentations 2; (5) neural networks; (6) VLSI architectures 2; (7) featured presentations 3; (8) verification 1; (9) analog design; (10) verification 2; (11) design innovations 1; (12) asynchronous design; and (13) design innovations 2

States and sequences of paired subspace ideals and their relationship to patterned brain function

It is found here that the state of a network of coupled ordinary differential equations is partially localizable through a pair of contractive ideal subspaces, chosen from dual complete lattices related to the synchrony and synchronization of cells within the network. The first lattice is comprised of polydiagonal subspaces, corresponding to synchronous activity patterns that arise from functional equivalences of cell receptive fields. This lattice is dual to a transdiagonal subspace lattice ordering subspaces transverse to these network-compatible synchronies. Combinatorial consideration of contracting polydiagonal and transdiagonal subspace pairs yields a rich array of dynamical possibilities for structured networks. After proving that contraction commutes with the lattice ordering, it is shown that subpopulations of cells are left at fixed potentials when pairs of contracting subspaces span the cells' local coordinates - a phenomenon named glyph formation here. Treatment of mappings between paired states then leads to a theory of network-compatible sequence generation. The theory's utility is illustrated with examples ranging from the construction of a minimal circuit for encoding a simple phoneme to a model of the primary visual cortex including high-dimensional environmental inputs, laminar speficicity, spiking discontinuities, and time delays. In this model, glyph formation and dissolution provide one account for an unexplained anomaly in electroencephalographic recordings under periodic flicker, where stimulus frequencies differing by as little as 1 Hz generate responses varying by an order of magnitude in alpha-band spectral power. Further links between coupled-cell systems and neural dynamics are drawn through a review of synchronization in the brain and its relationship to aggregate observables, focusing again on electroencephalography. Given previous theoretical work relating the geometry of visual hallucinations to symmetries in visual cortex, periodic perturbation of the visual system along a putative symmetry axis is hypothesized to lead to a greater concentration of harmonic spectral energy than asymmetric perturbations; preliminary experimental evidence affirms this hypothesis. To conclude, connections drawn between dynamics, sensation, and behavior are distilled to seven hypotheses, and the potential medical uses of the theory are illustrated with a lattice depiction of ketamine xylazine anaesthesia and a reinterpretation of hemifield neglect

Brainstem circuits involved in skilled forelimb movements

Movement is the main output of the nervous system as well as the fundamental form of interaction animals have with their environment. Due to its function and scope, movement has to be characterized by both stability and flexibility. Such apparently conflicting attributes are reflected in the complex organization of the motor system, composed of a vast network of widely distributed circuits interacting with each other to generate an appropriate motor output. Different neuronal structures, located throughout the brain, are responsible for producing a broad spectrum of actions, ranging from simple locomotion to complex goal directed movements such as reaching for food or playing a musical instrument. The brainstem is one of such structures, holding considerable importance in the generation of the motor output, but also largely unexplored, due to its less-than-accessible anatomic location, functional intricacies and the lack of appropriate techniques to investigate its complexity. Despite recent advances, a deeper understanding of the role of brainstem neuronal circuits in skilled movements is still missing. In this dissertation, we investigated the involvement of the lateral rostral medulla (LatRM) in the construction of skilled forelimb behaviors. The focus of my work was centered on elucidating the anatomical and functional relationships between LatRM and the caudal brainstem, and specifically on the interactions with the medullary reticular formation, considering both its ventral (MdV) and dorsal subdivisions (MdD). In summary, we reveal the existence of anatomically segregated subpopulations of neurons in the lower brainstem which encode different aspects of skilled forelimb movements. Moreover, we show that LatRM neurons are necessary for the correct execution of skilled motor programs and their activation produces complex coordinated actions. All this evidence suggests that LatRM may be a key orchestrator for skilled movements by functioning as integration center for upstream signals as well as coordinator by selecting the appropriate effectors in the lower medulla and the spinal cord

Correctness of services and their composition

We study correctness of services and their composition and investigate how the design of correct service compositions can be systematically supported. We thereby focus on the communication protocol of the service and approach these questions using formal methods and make contributions to three scenarios of SOC.Wir studieren die Korrektheit von Services und Servicekompositionen und untersuchen, wie der Entwurf von korrekten Servicekompositionen systematisch unterstützt werden kann. Wir legen dabei den Fokus auf das Kommunikationsprotokoll der Services. Mithilfe von formalen Methoden tragen wir zu drei Szenarien von SOC bei

A New Approach to Learning in Neuromorphic Hardware

This thesis presents a novel, highly flexible approach to plasticity and learning in brain-inspired computing systems. A classical digital processor was combined with local analog processing to achieve flexibility and efficiency. In particular, this allows for the implementation of modulated spike-timing dependent plasticity. The approach was formalized into an abstract hybrid hardware model. This model was used to simulate a reward-based learning task to estimate the effect of hardware constraints. To investigate the feasibility of the proposed architecture, a synthesizeable plasticity processor was designed and tested using the CoreMark general purpose benchmark (best score: 1.89 per MHz). The processor was also produced as part of a 65 nm proto- type chip, requiring 0.14 mm2 of die-area, and reaching a maximum clock frequency of 769 MHz. In a preparatory step a non-programmable plasticity implementation was developed, that is now part of the operational BrainScaleS wafer-scale system. This design was later extended with the plasticity processor to implement the proposed hybrid architecture. Simulations show a speed improvement of 42 % over the non- programmable variant. By preparation for production, the area requirement for the digital part is estimated to be 6.2 % of total area

Space Communications: Theory and Applications. Volume 3: Information Processing and Advanced Techniques. A Bibliography, 1958 - 1963

Annotated bibliography on information processing and advanced communication techniques - theory and applications of space communication