250 research outputs found

    Spiking Neural dP Systems

    Get PDF
    We bring together two topics recently introduced in membrane computing, the much investigated spiking neural P systems (in short, SN P systems), inspired from the way the neurons communicate through spikes, and the dP systems (distributed P systems, with components which "read" strings from the environment and then cooperate in accepting their concatenation). The goal is to introduce SN dP systems, and to this aim we first introduce SN P systems with the possibility to input, at their request, spikes from the environment; this is done by so-called request rules. A preliminary investigation of the obtained SN dP systems (they can also be called automata) is carried out. As expected, request rules are useful, while the distribution in terms of dP systems can handle languages which cannot be generated by usual SN P systems. We always work with extended SN P systems; the non-extended case, as well as several other natural questions remain open.Junta de Andalucía P08 – TIC 0420

    Membrane computing: traces, neural inspired models, controls

    Get PDF
    Membrane Computing:Traces, Neural Inspired Models, ControlsAutor: Armand-Mihai IonescuDirectores: Dr. Victor Mitrana (URV)Dr. Takashi Yokomori (Universidad Waseda, Japón)Resumen Castellano:El presente trabajo está dedicado a una área muy activa del cálculo natural (que intenta descubrir la odalidad en la cual la naturaleza calcula, especialmente al nivel biológico), es decir el cálculo con membranas, y más preciso, a los modelos de membranas inspirados de la funcionalidad biológica de la neurona.La disertación contribuye al área de cálculo con membranas en tres direcciones principales. Primero, introducimos una nueva manera de definir el resultado de una computación siguiendo los rastros de un objeto especificado dentro de una estructura celular o de una estructura neuronal. A continuación, nos acercamos al ámbito de la biología del cerebro, con el objetivo de obtener varias maneras de controlar la computación por medio de procesos que inhiben/de-inhiben. Tercero, introducimos e investigamos en detallo - aunque en una fase preliminar porque muchos aspectos tienen que ser clarificados - una clase de sistemas inspirados de la manera en la cual las neuronas cooperan por medio de spikes, pulsos eléctricos de formas idénticas.English summary:The present work is dedicated to a very active branch of natural computing (which tries to discover the way nature computes, especially at a biological level), namely membrane computing, more precisely, to those models of membrane systems mainly inspired from the functioning of the neural cell.The present dissertation contributes to membrane computing in three main directions. First, we introduce a new way of defining the result of a computation by means of following the traces of a specified object within a cell structure or a neural structure. Then, we get closer to the biology of the brain, considering various ways to control the computation by means of inhibiting/de-inhibiting processes. Third, we introduce and investigate in a great - though preliminary, as many issues remain to be clarified - detail a class of P systems inspired from the way neurons cooperate by means of spikes, electrical pulses of identical shapes

    Spiking Neural P System Simulations on a High Performance GPU Platform

    Get PDF
    In this paper we present our results in adapting a Spiking Neural P system (SNP system) simulator to a high performance graphics processing unit (GPU) platform. In particular, we extend our simulations to larger and more complex SNP systems using an NVIDIA Tesla C1060 GPU. The C1060 is manufactured for high performance computing and massively parallel computations, matching the maximally parallel nature of SNP systems. Using our GPU accelerated simulations we present speedups of around 200× for some SNP systems, compared to CPU only simulations.Junta de Andalucía P08–TIC-04200Ministerio de Educación y Ciencia TIN2009–1319

    Some Applications of Spiking Neural P Systems

    Get PDF
    In this paper we investigate some applications of spiking neural P systems regarding their capability to solve some classical computer science problems. In this respect versatility of such systems is studied to simulate a well known parallel computational model, namely the Boolean circuits. In addition, another notorious application -- sorting -- is considered within this framework

    Spiking Neural P Systems with Learning Functions

    Get PDF

    Performing Arithmetic Operations with Spiking Neural P Systems

    Get PDF
    We consider spiking neural P systems as devices which can be used to perform some basic arithmetic operations, namely addition, subtraction, comparison and multiplication by a fixed factor. The input to these systems are natural numbers expressed in binary form, encoded as appropriate sequences of spikes. A single system accepts as inputs numbers of any size. The present work may be considered as a ¯rst step towards the design of a CPU based on the working of spiking neural P systems.Ministerio de Educación y Ciencia TIN2006–13425Junta de Andalucía P08-TIC-0420

    SpikingJelly: An open-source machine learning infrastructure platform for spike-based intelligence

    Full text link
    Spiking neural networks (SNNs) aim to realize brain-inspired intelligence on neuromorphic chips with high energy efficiency by introducing neural dynamics and spike properties. As the emerging spiking deep learning paradigm attracts increasing interest, traditional programming frameworks cannot meet the demands of the automatic differentiation, parallel computation acceleration, and high integration of processing neuromorphic datasets and deployment. In this work, we present the SpikingJelly framework to address the aforementioned dilemma. We contribute a full-stack toolkit for pre-processing neuromorphic datasets, building deep SNNs, optimizing their parameters, and deploying SNNs on neuromorphic chips. Compared to existing methods, the training of deep SNNs can be accelerated 11×11\times, and the superior extensibility and flexibility of SpikingJelly enable users to accelerate custom models at low costs through multilevel inheritance and semiautomatic code generation. SpikingJelly paves the way for synthesizing truly energy-efficient SNN-based machine intelligence systems, which will enrich the ecology of neuromorphic computing.Comment: Accepted in Science Advances (https://www.science.org/doi/10.1126/sciadv.adi1480

    Design and test of a neural microprocessor

    Get PDF
    En aquest projecte, es dissenya un microprocessador neuronal per ser implementat en FPGAs. Aquesta tecnologia consisteix en un processador softcore basat en RISC-V descrit amb SystemVerilog que s'utilitza per controlar un coprocessador encarregat d'executar una xarxa neuronal spiking amb propagació directa descrita amb VHDL. El control es fa amb senyals que es generen a partir d'instruccions SIMD personalitzades definides en una extensió del conjunt d’instruccions RSIC-V. Per fer-ho, es modifica el processador de manera que pugui detectar i descodificar les noves instruccions emmagatzemades a la seva memòria de programa. Per facilitar la tasca de definir el contingut de la memòria del programa, s'utilitza un codi escrit en C i es desenvolupa un conjunt d'instruccions C personalitzades. Aquestes instruccions es basen en l'ús de macros i inline assembly, i la seva finalitat és facilitar i permetre l'ús de les instruccions personalitzades RISC-V en el codi d'alt nivell. Per demostrar el correcte funcionament del projecte, se simula el microprocessador neuronal i després es prova a l'FPGA d'una placa de desenvolupament Nexys 4, amb el coprocessador implementat per resoldre el problema XOR. La implementació del coprocessador es replica amb C i s'executa a l'FPGA utilitzant només el processador predeterminat sense modificar. Finalment, els resultats s'analitzen i es comparen per determinar les compensacions entre els dos enfocaments en termes de temps d'execució, consum d'energia i espai utilitzat.En este proyecto, se diseña un microprocesador neuronal para su implementación en FPGAs. Esta tecnología consiste en un procesador softcore basado en RISC-V descrito con SystemVerilog que se utiliza para controlar a un coprocesador encargado de ejecutar una red neuronal spiking con propagación directa descrita con VHDL. El control se realiza con señales que se generan a partir de instrucciones SIMD personalizadas definidas en una extensión del conjunto de instrucciones RSIC-V. Para ello, se modifica el procesador de forma que pueda detectar y descodificar las nuevas instrucciones almacenadas en su memoria de programa. Para facilitar la tarea de definir el contenido de la memoria del programa, se utiliza un código escrito en C y se desarrolla un conjunto de instrucciones C personalizadas. Estas instrucciones se basan en el uso de macros e inline assembly, y su finalidad es facilitar y permitir el uso de las instrucciones personalizadas RISC-V en el código de alto nivel. Para demostrar el correcto funcionamiento del proyecto, se simula el microprocesador neuronal y después se prueba en la FPGA de una placa de desarrollo Nexys 4, con el coprocesador implementado para resolver el problema XOR. La implementación del coprocesador se replica con C y se ejecuta en la FPGA utilizando sólo el procesador predeterminado sin modifcar. Por último, los resultados se analizan y se comparan para determinar las compensaciones entre ambos enfoques en términos de tiempo de ejecución, consumo de energía y espacio utilizado.In this project, a neural microprocessor is designed to be implemented in FPGAs. This technology consists of a RISC-V-based soft processor described in SystemVerilog that is used to control a coprocessor in charge of executing a feedforward spiking neural network described in VHDL. The control is done with signals that are generated from custom-designed SIMD instructions defined in a RISC-V ISA extension. To do it, the processor is modified such that it can detect and decode the new instructions stored in its program memory. To facilitate the task of defining the program memory contents, a code written in C is used and a set of custom C instructions is developed. These instructions are based on the use of macros and inline assembly, and their purpose is to facilitate and allow the use of the RISC-V custom instructions in the high-level code. To demonstrate the correct operation of the project, the neural microprocessor is simulated and then tested on the FPGA of a Nexys 4 development board, with the coprocessor implemented for solving the XOR problem. The coprocessor implementation is replicated with C and executed in the FPGA using only the default processor without being modified. Finally, the results are analyzed and compared to determine the trade-offs between the two approaches in terms of execution time, power consumption, and utilized space

    Evolutionary morphogenesis for multi-cellular systems

    Get PDF
    With a gene required for each phenotypic trait, direct genetic encodings may show poor scalability to increasing phenotype length. Developmental systems may alleviate this problem by providing more efficient indirect genotype to phenotype mappings. A novel classification of multi-cellular developmental systems in evolvable hardware is introduced. It shows a category of developmental systems that up to now has rarely been explored. We argue that this category is where most of the benefits of developmental systems lie (e.g. speed, scalability, robustness, inter-cellular and environmental interactions that allow fault-tolerance or adaptivity). This article describes a very simple genetic encoding and developmental system designed for multi-cellular circuits that belongs to this category. We refer to it as the morphogenetic system. The morphogenetic system is inspired by gene expression and cellular differentiation. It focuses on low computational requirements which allows fast execution and a compact hardware implementation. The morphogenetic system shows better scalability compared to a direct genetic encoding in the evolution of structures of differentiated cells, and its dynamics provides fault-tolerance up to high fault rates. It outperforms a direct genetic encoding when evolving spiking neural networks for pattern recognition and robot navigation. The results obtained with the morphogenetic system indicate that this "minimalist” approach to developmental systems merits further stud
    corecore