558 research outputs found

    Design of a fault tolerant airborne digital computer. Volume 1: Architecture

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    This volume is concerned with the architecture of a fault tolerant digital computer for an advanced commercial aircraft. All of the computations of the aircraft, including those presently carried out by analogue techniques, are to be carried out in this digital computer. Among the important qualities of the computer are the following: (1) The capacity is to be matched to the aircraft environment. (2) The reliability is to be selectively matched to the criticality and deadline requirements of each of the computations. (3) The system is to be readily expandable. contractible, and (4) The design is to appropriate to post 1975 technology. Three candidate architectures are discussed and assessed in terms of the above qualities. Of the three candidates, a newly conceived architecture, Software Implemented Fault Tolerance (SIFT), provides the best match to the above qualities. In addition SIFT is particularly simple and believable. The other candidates, Bus Checker System (BUCS), also newly conceived in this project, and the Hopkins multiprocessor are potentially more efficient than SIFT in the use of redundancy, but otherwise are not as attractive

    Introduction to Forward-Error-Correcting Coding

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    This reference publication introduces forward error correcting (FEC) and stresses definitions and basic calculations for use by engineers. The seven chapters include 41 example problems, worked in detail to illustrate points. A glossary of terms is included, as well as an appendix on the Q function. Block and convolutional codes are covered

    A study of binary codes

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    Call number: LD2668 .R4 1965 M26

    Versatile Error-Control Coding Systems

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    $NC research reported in this thesis is in the field of error-correcting codes, which has evolved as a very important branch of information theory. The main use of error-correcting codes is to increase the reliability of digital data transmitted through a noisy environment. There are, sometimes, alternative ways of increasing the reliability of data transmission, but coding methods are now competitive in cost and complexity in many cases because of recent advances in technology. The first two chapters of this thesis introduce the subject of error-correcting codes, review some of the published literature in this field and discuss the advanĀ­tages of various coding techniques. After presenting linear block codes attention is from then on concentrated on cyclic codes, which is the subject of Chapter 3. The first part of Chapter 3 presents the mathematiĀ­cal background necessary for the study of cyclic codes and examines existing methods of encoding and their practical implementation. In the second part of Chapter 3 various ways of decoding cyclic codes are studied and from these considerations, a general decoder for cyclic codes is devised and is presented in Chapter 4. Also, a review of the principal classes of cyclic codes is presented. Chapter 4 describes an experimental system constructed for measuring the performance of cyclic codes initially RC5GI5SCD by random errors and then by bursts of errors. Simulated channels are used both for random and burst errors. A computer simulation of the whole system was made in order to verify the accuracy of the experimental results obtained. Chapter 5 presents the various results obtained with the experimental system and by computer simulation, which allow a comparison of the efficiency of various cyclic codes to be made. Finally, Chapter 6 summarises and disĀ­cusses the main results of the research and suggests interesting points for future investigation in the area. The main objective of this research is to contribute towards the solution of a fairly wide range of problems arising in the design of efficient coding schemes for practical applications; i.e. a study of coding from an engineering point of view

    Variable Redundancy Coding for Adaptive Error Control

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    This thesis is concerned with variable redundancy(VR) error control coding. VR coding is proposed as one method of providing efficient adaptive error control for time-varying digital data transmission links. The VR technique involves using a set of short, easy to implement, block codes; rather than the one code of a fixed redundancy system which is usually inefficient, and complex to decode. With a VR system, efficient data-rate low-power codes are used when channel conditions are good, and very high-power inefficient codes are used when the channel is noisy. The decoder decides which code is required to cope with current conditions, and communicates this decision to the encoder by means of a feedback link. This thesis presents a theoretical and practical investigation of the VR technique, and aims to show that when compared with a fixed redundancy system one or more of the advantages of increased average data throughput, decreased maximum probability of erroneous decoding, and decreased complexity can be realised. This is confirmed by the practical results presented in the thesis, which were obtained from field trials of an experimental VR system operating over the HEā€™ radio channel, and from computer simulations. One consequence of the research has been the inception of a study of codes with disjoint code books and mutual Hamming distance (initially considered for combatting feedback errors), and this topic is introduced in the thesis

    A study of major coding techniques for digital communication Final report

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    Coding techniques for digital communication channel
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