Elettronica integrata per la comunicazione quantistica

Questo progetto intende fornire una soluzione di natura elettronica al problema dell'individuazione di due eventi che si manifestano in istanti temporali molto ravvicinati tra loro. Più precisamente, parliamo di segnali elettrici con determinate caratteristiche di intensità e durata, provenienti, dopo la necessaria conversione, da un sistema di tipo quantistico. Il lavoro svolto è la continuazione e l'ampliamento di quanto precedentemente realizzato dai colleghi Marco Pezzini e Andrea Merlin nell'ambito della loro tesi di laurea; l'ambiente in cui è stato sviluppato è il Laboratorio Luxor dell'Università di Padova, all'interno del quale è stato possibile accedere a tutta la strumentazione necessaria per i test sperimentali. In questo elaborato si vuole dare una visione il più possibile ad ampio raggio dell'argomento di interesse. Introdurremo i concetti di meccanica quantistica, fondamentali per comprendere il contesto in si opera, e quindi passeremo a descrivere il fenomeno sico, l'entanglement, di cui ci proponiamo di realizzare uno strumento di misura. Dalla dimensione ottica, nota la procedura di conversione dei fotoni in segnali elettrici, sposteremo la nostra attenzione alle metodologie che permettono la rivelazione di intervalli temporali molto brevi e, dopo aver motivato la scelta dell'hardware adatto alle nostre esigenze e averne elencato le funzionalità, partiremo con la descrizione del progetto vero e proprio. Seguirà un capitolo dedicato ai test sperimentali eseguiti per valutare qualità e punti deboli del dispositivo realizzato e, inne, verranno tratte le dovute conclusioni prospettando nuovi scenari che permettano di risolvere eventuali problemi rimasti irrisolti e migliorare le prestazioni complessive del sistema sviluppat

Longitudinal Studies Of Caenorhabditis Elegans Aging And Behavior Using A Microfabricated Multi-Well Device

The roundworm C. elegans is a powerful model organism for dissecting the genetics of behavior and aging. The central genetic pathways regulating lifespan, such as insulin signaling, were first identified in worms. C. elegans is also the only animal for which a full map of all neural synpatic connections, or connectome, exists. However, current manual and automated methods are unable to efficiently monitor and quantify behavioral phenotypes which unfold over long time scales. Therefore, it has been difficult to study phenotypes such as long-term behavior states and behavioral changes with age in worms. To address these limitations, here I describe a novel device, called the WorMotel, to longitudinally monitor behavior in up to 240 single C. elegans on time scales encompassing the worm\u27s maximum lifespan of two months. The WorMotel is fabricated from polydimethylsiloxane from a 3-D printed negative mold. Each device consists of 240 individual wells, each of which houses a single worm atop agar and bacterial food. I use custom software to quantify movement between frames to longitudinally monitor behavior for each animal. I first describe the application of the WorMotel to the automation of lifespan measurements in C. elegans, the characterization of intra-strain and inter-strain variability in behavioral decline, the relationship between behavior and lifespan, and the scaling of behavioral decline with increasing stress. I then describe the application of the WorMotel to quantify locomotive behavioral states and their modulation by the presence or absence of food as well as biogenic amine neurotransmitters. Using the WorMotel in combination with genetics and pharmacology, I outline a neural circuit by which the biogenic amines serotonin and octopamine regulate locomotion state to signal animals to adopt behavior appropriate to a fed and fasting state, respectively. I include protocols for construction of custom imaging rigs and requirements for long-term imaging as an appendix. The WorMotel is a powerful tool that can facilitate discovery and understanding of the mechanisms underlying long-term phenotypes such as behavioral states and aging

Low Power Circuit Design in Sustainable Self Powered Systems for IoT Applications

The Internet-of-Things (IoT) network is being vigorously pushed forward from many fronts in diverse research communities. Many problems are still there to be solved, and challenges are found among its many levels of abstraction. In this thesis we give an overview of recent developments in circuit design for ultra-low power transceivers and energy harvesting management units for the IoT. The first part of the dissertation conducts a study of energy harvesting interfaces and optimizing power extraction, followed by power management for energy storage and supply regulation. we give an overview of the recent developments in circuit design for ultra-low power management units, focusing mainly in the architectures and techniques required for energy harvesting from multiple heterogeneous sources. Three projects are presented in this area to reach a solution that provides reliable continuous operation for IoT sensor nodes in the presence of one or more natural energy sources to harvest from. The second part focuses on wireless transmission, To reduce the power consumption and boost the Tx energy efficiency, a novel delay cell exploiting current reuse is used in a ring-oscillator employed as the local oscillator generator scheme. In combination with an edge-combiner power amplifier, the Tx showed a measured energy efficiency of 0.2 nJ=bit and a normalized energy efficiency of 3.1 nJ=bit:mW when operating at output power levels up to -10 dBm and data rates of 3 Mbps

Design and demonstration of integrated micro-electro-mechanical relay circuits for VLSI applications

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (p. 115-121).Complementary-Metal-Oxide-Semiconductor (CMOS) feature size scaling has resulted in significant improvements in the performance and energy efficiency of integrated circuits in the past 4 decades. However, in the last decade and for technology nodes below 90 nm, the scaling of threshold and supply voltages has slowed, as a result of subthreshold leakage, and power density has increased with each new technology node. This has forced a move toward multi-core architectures, but the energy efficiency benefits of parallelism are limited by the sub-thresahold leakage and the minimum energy point for a given function. Avoiding this roadblock requires an alternative device with more ideal switching characteristics. One promising class of such devices is the electro-statically actuated micro-electro-mechanical (MEM) relay which offers zero leakage current and abrupt turn-on behavior. Although a MEM relay is inherently slower than a CMOS transistor due to the mechanical movement, we have developed circuit design methodologies to mitigate this problem at the system level. This thesis explores such design optimization techniques and investigates the viability of MEM relays as an alternative switching technology for very-large scale integration (VLSI) applications. In the first part of this thesis, the feasibility of MEM relays for power management applications is discussed. Due to their negligibly low leakage, in certain applications, chips utilizing power gates built with MEM relays can achieve lower total energy than those built with CMOS transistors. A simple comparative analysis is presented and provides design guidelines and energy savings estimates as a function of technology parameters, and quantifies the further benefits of scaled relay designs. We also demonstrate a relay chip successfully power-gating a CMOS chip, and show a relay-based pulse generator suitable for self-timed operation. Going beyond power-gating applications, this work also describes circuit techniques and trade-offs for logic design with MEM-relays, focusing on multipliers which are commonly known as the most complex arithmetic units in a digital system. These techniques leverage the large disparity between mechanical and electrical time-constants of a relay, partitioning the logic into large, complex gates to minimize the effect of mechanical delay and improve circuit performance. At the component design level, innovations in compressor unit design minimize the required number of relays for each block and facilitate component cascading with no delay penalty. We analyze the area/energy/delay trade-offs vs. CMOS designs, for typical bit-widths, and show that scaled relays offer 10-20x lower energy per operation for moderate throughputs (<10-100MOPS). In addition to this analysis, we demonstrate the functionality of some of the most complex MEM relay circuits reported to date. Finally, considering the importance of signal generation and transmission in VLSI systems, this thesis presents MEM relay-based I/O units, focusing on design and demonstration of digital to analog converters (DAC). It also explores the concept of faster-than-mechanical-delay signal transmission.by Hossein Fariborzi.Ph.D

Energy-efficient wireless sensors : fewer bits, Moore MEMS

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis. Page 184 blank.Includes bibliographical references (p. 171-183).Adoption of wireless sensor network (WSN) technology could enable improved efficiency across a variety of industries that include building management, agriculture, transportation, and health care. Most of the technical challenges of WSNs can be linked to the stringent energy constraints of each sensor node, where wireless communication and leakage energy are the doninant components of active and idle energy costs. To address these two limitations, this thesis adopts compressed sensing (CS) theory as a generic source coding framework to minimize the transmitted data and proposes the use of micro-electro-mechanical (MEM) relay technology to eliminate the idle leakage. To assess the practicality of adopting CS as a source coding framework we examine the inpact of finite resources, input noise, and wireless channel impairments on the compression and reconstruction performance of CS. We show that CS, despite being a lossy compression algorithm, can realize compression factors greater than loX with no loss in fidelity for sparse signals quantized to medium resolutions. We also model the hardware costs for implementing the CS encoder and results from a test chip designed in a 90 nm CMOS process that consumes only 1.9 [mu]W for operating frequencies below 20 kHz, verifies the models. The encoder is desioned to enable continuous, on-the-fly compression that is demonstrated on electroencephalography (EEG) and electrocardiogram (EKG) signals to show the applicability of CS. To address sub-threshold leakage, which limits the energy performance in CMOS-based sensor nodes, we develop design methodologies towards leveraging the zero leakage characteristics of MEM relays while overcoming their slower switching speeds. Projections on scaled relay circuits show the potential for greater than loX improvements in energy efficieicy over CMOS at up to 10-100 Mops for a variety of circuit sub-systems. Experimental results demonstrating functionality for several circuit building blocks validate the viability of the technology, while feedback from these results is used to refine the device design. Incorporating all of the design elements, w present simnulation results for our most recent test chip design which implements relay-based versions of the CS encoder circuits in a 0.25 jim lithographic process showing 5X improvement over our 90 nm CMOS design.by Fred Chen.Ph.D

Internal Combustion Engines and Powertrain Systems for future Transport 2019

Internal Combustion Engines and Powertrain Systems for Future Transport 2019 provides a forum for IC engine, fuels and powertrain experts, and looks closely at developments in powertrain technology required to meet the demands of the low carbon economy and global competition in all sectors of the transportation, off-highway and stationary power industries

Fragmentation of molecular ions in ultrafast laser pulses

Master of ScienceDepartment of PhysicsItzhak Ben-ItzhakImaging the interaction of molecular ion beams with ultrafast intense laser fields is a very powerful method to understand the fragmentation dynamics of molecules. Femtosecond laser pulses with different wavelengths and intensities are applied to dissociate and ionize molecular ions, and each resulting fragmentation channel can be studied separately by implementing a coincidence three-dimensional (3D) momentum imaging method. The work presented in this master’s report can be separated into two parts. First, the interaction between molecular ion beams and femtosecond laser pulses, in particular, the dissociation of CO[superscript]+ into C[superscript]++O, is studied. For that purpose, measurements are conducted at different laser intensities and wavelengths to investigate the possible pathways of dissociation into C[superscript]++O. The study reveals that CO[superscript]+ starts to dissociate from the quartet electronic state at low laser intensities. Higher laser intensity measurements, in which a larger number of photons can be absorbed by the molecule, show that the doublet electronic states with deeper potential wells, e.g. A [superscript]2Π, contribute to the dissociation of the molecule. In addition, the three-body fragmentation of CO[subscript]2[superscript]+ into C[superscript]++O[superscript]++O[superscript]+ is studied, and two breakup scenarios are separated using the angle between the sum and difference of the momentum vectors of two O[superscript]+ fragments. In the second part, improvements in experimental techniques are discussed. Development of a reflective telescope setup intended to increase the conversion efficiency of ultraviolet (UV) laser pulse generation is described, and the setup is used in the studies of CO[superscript]+ dissociation described in this report. The other technical study presented here is the measurement of the position dependence of timing signals picked off of a microchannel plate (MCP) surface. The experimental method is presented and significant time spread over the surface of the MCP detector is reported [1]

Synthèses de fréquence à bas bruit basées sur des oscillateurs opto-électroniques couplés intégrées en technologie BiCMOS SiGe 130nm

Les hyperfréquences jouent un rôle indispensable dans le domaine des télécommunications, que ce soit pour la téléphonie mobile, les radars automobiles, le Wi-Fi ou encore la transmission satellitaire, sans que cette liste ne soit évidemment exhaustive. Pour l'ensemble de ces applications omniprésentes dans la société actuelle, ce sont ces signaux hyperfréquences qui servent de porteuses pour transmettre l'information sur de plus ou moins longues distances. Les méthodes de génération de signaux hyperfréquences actuelles sont basées sur des boucles à verrouillage de phase (PLL). Elles réalisent une multiplication d'une fréquence de référence basse de quelques dizaines à quelques centaines de mégahertz pour l'amener à quelques gigahertz voire dizaines de gigahertz. Il y a cependant un inconvénient majeur lié à cette méthode : synthétiser une fréquence par multiplication d'une référence basse s'accompagne d'une augmentation théorique du bruit de phase du signal généré, d'autant plus que le rapport de multiplication est élevé. À l'inverse, une synthèse par division de fréquence diminue le bruit de phase théorique. Or on voit apparaître depuis quelques années des références à des fréquences déjà élevées, basées sur des oscillateurs optoélectroniques couplés (COEO), qui peuvent dès lors servir à réaliser des synthèses basées sur de la division de fréquence, et c'est dans ce cadre que se situe le travail de cette thèse. Nous utilisons pour référence de fréquence, des COEO qui génèrent un signal de fréquence élevée à haute pureté spectrale, à 10 et 30 GHz. L'objectif est alors d'être capable de générer des signaux dont la fréquence est inférieure à 30 GHz et aussi basse que 1 GHz. Ces signaux synthétisés doivent conserver autant que possible la pureté spectrale du signal de référence en pénalisant le moins possible le bénéfice théorique apporté par la division. Cette thèse décrit la conception de diviseurs hyperfréquences à très faible bruit de phase résiduel disposant au final de rapports de division fractionnaires et/ou programmables. Dans un premier temps, nous avons conçu des diviseurs de rapports fixes afin d'estimer les performances en bruit de phase atteignables à cette fréquence de travail sur les technologies utilisées. Plusieurs diviseurs ECL par 2 et par 3 ont été conçus, fabriqués et mesurés pour une division jusqu'à 30 GHz. Un diviseur CMOS par 10 ainsi qu'une technique de resynchronisation permettant d'annuler la majeure partie du bruit de phase de la chaîne de division sont également présentés. Plusieurs diviseurs analogiques à rang fixe ont également été conçus, bien que s'étant révélés moins performants au final : un diviseur à verrouillage par injection (ILFD) et un diviseur à renforcement du second harmonique, qui réalisent tous les deux une division par 3 autour de 30 GHz. Pour terminer, nous avons conçu des diviseurs fractionnaires large bande fonctionnant au moins jusqu'à 30 GHz et offrant des performances en bruit de phase compétitives. Si ces modèles s'inspirent du principe régénératif connu de Miller, nous en proposons une déclinaison tout à fait originale. Une première série de diviseurs fractionnaires fixes a ainsi été réalisée pour des rapports fixes de 1,25, 2,5 et 4,5. Pour terminer, un diviseur fractionnaire dont la partie décimale est programmable a été ensuite été réalisé et mesuré. Il s'agit d'un diviseur fractionnaire dont la partie entière du rapport de division est 4 et la partie décimale codée sur 4 bits.Microwave signals are essential in the field of telecommunications whether for mobile telephony, automotive radar, Wi-Fi or even satellite transmission, without this list being exhaustive. For all these ubiquitous applications in our current society, microwave signals are the carriers for the transmission of information from a system to another. Microwave signals synthesis techniques are mostly based on Phase-Locked Loop (PLL). PLL multiply a low frequency reference ranging from a dozen to a few hundred megahertz toward a few gigahertz to a few dozen gigahertz. However, there is one main drawback with this synthesis technique: synthesizing a frequency by multiplying a low frequency reference induces an unavoidable rise of the theoretical phase noise of the synthesized signal, even more if the multiplication factor is high. On the contrary, frequency synthesis by division lowers the theoretical phase noise. Yet, high frequency high spectral purity frequency references called Coupled OptoElectronic Oscillator (COEO) are being developed for a few years. They are perfect candidate to be used as reference for frequency synthesis by division, and this is within this framework that our research takes place. We use as frequency references two COEO generating high spectral purity signals at 10 and 30?GHz. The aim of our work is then to be able to generate different signals whose frequencies are below 30?GHz and as low as 1?GHz. These synthesized signals must preserve as much as possible the spectral purity of the reference while deteriorating as less as possible the theoretical benefit brought by the division. This thesis describes the conception of low residual phase noise microwave frequency dividers operating, for the most evolved ones, fractional and/or programmable division ratios. In a first place, we designed static frequency dividers in order to estimate the phase noise performance that we can conceivably reach with the technology we use. Several ECL dividers by 2 and by 3 are designed, fabricated and measured for a division up to 30?GHz. A CMOS divider by 10 along with a resynchronization technique allowing to cancel most of the phase noise in a cascaded divider are also presented. In a second place, we designed analog dividers, although they have proven to be less competitive than digital dividers: an Injection-Locked Frequency Divider (ILFD) and a regenerative second-harmonic frequency divider, both realising a frequency division by 3 around 30 GHz. Finally, we designed wideband fractional dividers operating at least at 30 GHz with competitive phase noise performance. Even though they are inspired by Miller's regenerative frequency dividers, we introduce here an innovative declination of fractional dividers. A first series of static fractional dividers has been designed with ratios of 1.25, 2.5 and 4.5. Ultimately, a fractional divider with a programmable decimal part has been designed and measured. This divider has an integer part of 4 and a decimal part programmed on 4 bits

Internal Combustion Engines and Powertrain Systems for future Transport 2019

Internal Combustion Engines and Powertrain Systems for Future Transport 2019 provides a forum for IC engine, fuels and powertrain experts, and looks closely at developments in powertrain technology required to meet the demands of the low carbon economy and global competition in all sectors of the transportation, off-highway and stationary power industries