Memristor-Based Volistor Gates Compute Logic with Low Power Consumption

We introduce a novel volistor logic gate which uses voltage as input and resistance as output. Volistors rely on the diode-like behavior of rectifying memristors. We show how to realize the first logic level, counted from the input, of any Boolean function with volistor gates in a memristive crossbar network. Unlike stateful logic, there is no need to store the inputs as resistances, and computation is performed directly. The fan-in and fan-out of volistor gates are large and different from traditional memristor circuits. Compared to solely memristive stateful logic, a combination of volistors and stateful inhibition gates can significantly reduce the number of operations required to calculate arbitrary multi-output Boolean functions. The power consumption of volistor logic is computed and compared with the power consumption of stateful logic using the simulation results obtained by LTspice—when implemented in a 1 × 8 or an 8 × 1 crosspoint array, volistors consume significantly less power

New Approaches for Memristive Logic Computations

Over the past five decades, exponential advances in device integration in microelectronics for memory and computation applications have been observed. These advances are closely related to miniaturization in integrated circuit technologies. However, this miniaturization is reaching the physical limit (i.e., the end of Moore\u27s Law). This miniaturization is also causing a dramatic problem of heat dissipation in integrated circuits. Additionally, approaching the physical limit of semiconductor devices in fabrication process increases the delay of moving data between computing and memory units hence decreasing the performance. The market requirements for faster computers with lower power consumption can be addressed by new emerging technologies such as memristors. Memristors are non-volatile and nanoscale devices and can be used for building memory arrays with very high density (extending Moore\u27s law). Memristors can also be used to perform stateful logic operations where the same devices are used for logic and memory, enabling in-memory logic. In other words, memristor-based stateful logic enables a new computing paradigm of combining calculation and memory units (versus von Neumann architecture of separating calculation and memory units). This reduces the delays between processor and memory by eliminating redundant reloading of reusable values. In addition, memristors consume low power hence can decrease the large amounts of power dissipation in silicon chips hitting their size limit. The primary focus of this research is to develop the circuit implementations for logic computations based on memristors. These implementations significantly improve the performance and decrease the power of digital circuits. This dissertation demonstrates in-memory computing using novel memristive logic gates, which we call volistors (voltage-resistor gates). Volistors capitalize on rectifying memristors, i.e., a type of memristors with diode-like behavior, and use voltage at input and resistance at output. In addition, programmable diode gates, i.e., another type of logic gates implemented with rectifying memristors are proposed. In programmable diode gates, memristors are used only as switches (unlike volistor gates which utilize both memory and switching characteristics of the memristors). The programmable diode gates can be used with CMOS gates to increase the logic density. As an example, a circuit implementation for calculating logic functions in generalized ESOP (Exclusive-OR-Sum-of-Products) form and multilevel XOR network are described. As opposed to the stateful logic gates, a combination of both proposed logic styles decreases the power and improves the performance of digital circuits realizing two-level logic functions Sum-of-Products or Product-of-Sums. This dissertation also proposes a general 3-dimentional circuit architecture for in-memory computing. This circuit consists of a number of stacked crossbar arrays which all can simultaneously be used for logic computing. These arrays communicate through CMOS peripheral circuits

Memristive Computing

Memristive computing refers to the utilization of the memristor, the fourth fundamental passive circuit element, in computational tasks. The existence of the memristor was theoretically predicted in 1971 by Leon O. Chua, but experimentally validated only in 2008 by HP Labs. A memristor is essentially a nonvolatile nanoscale programmable resistor — indeed, memory resistor — whose resistance, or memristance to be precise, is changed by applying a voltage across, or current through, the device. Memristive computing is a new area of research, and many of its fundamental questions still remain open. For example, it is yet unclear which applications would benefit the most from the inherent nonlinear dynamics of memristors. In any case, these dynamics should be exploited to allow memristors to perform computation in a natural way instead of attempting to emulate existing technologies such as CMOS logic. Examples of such methods of computation presented in this thesis are memristive stateful logic operations, memristive multiplication based on the translinear principle, and the exploitation of nonlinear dynamics to construct chaotic memristive circuits. This thesis considers memristive computing at various levels of abstraction. The first part of the thesis analyses the physical properties and the current-voltage behaviour of a single device. The middle part presents memristor programming methods, and describes microcircuits for logic and analog operations. The final chapters discuss memristive computing in largescale applications. In particular, cellular neural networks, and associative memory architectures are proposed as applications that significantly benefit from memristive implementation. The work presents several new results on memristor modeling and programming, memristive logic, analog arithmetic operations on memristors, and applications of memristors. The main conclusion of this thesis is that memristive computing will be advantageous in large-scale, highly parallel mixed-mode processing architectures. This can be justified by the following two arguments. First, since processing can be performed directly within memristive memory architectures, the required circuitry, processing time, and possibly also power consumption can be reduced compared to a conventional CMOS implementation. Second, intrachip communication can be naturally implemented by a memristive crossbar structure.Siirretty Doriast

Memristors for the Curious Outsiders

We present both an overview and a perspective of recent experimental advances and proposed new approaches to performing computation using memristors. A memristor is a 2-terminal passive component with a dynamic resistance depending on an internal parameter. We provide an brief historical introduction, as well as an overview over the physical mechanism that lead to memristive behavior. This review is meant to guide nonpractitioners in the field of memristive circuits and their connection to machine learning and neural computation.Comment: Perpective paper for MDPI Technologies; 43 page

Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture

Reducing power consumption in nowadays computer technologies represents an increasingly difficult challenge. Conventional computing architectures suffer from the so-called von Neumann bottleneck (VNB), which consists in the continuous need to exchange data and instructions between the memory and the processing unit, leading to significant and apparently unavoidable power consumption. Even the hardware typically employed to run Artificial Intelligence (AI) algorithms, such as Deep Neural Networks (DNN), suffers from this limitation. A change of paradigm is so needed to comply with the ever-increasing demand for ultra-low power, autonomous, and intelligent systems. From this perspective, emerging memristive non-volatile memories are considered a good candidate to lead this technological transition toward the next-generation hardware platforms, enabling the possibility to store and process information in the same place, therefore bypassing the VNB. To evaluate the state of current public-available devices, in this work commercial-grade packaged Self Directed Channel memristors are thoroughly studied to evaluate their performance in the framework of in-memory computing. Specifically, the operating conditions allowing both analog update of the synaptic weight and stable binary switching are identified, along with the associated issues. To this purpose, a dedicated yet prototypical system based on an FPGA control platform is designed and realized. Then, it is exploited to fully characterize the performance in terms of power consumption of an innovative Smart IMPLY (SIMPLY) Logic-in-Memory (LiM) computing framework that allows reliable in-memory computation of classical Boolean operations. The projection of these results to the nanoseconds regime leads to an estimation of the real potential of this computing paradigm. Although not investigated in this work, the presented platform can also be exploited to test memristor-based SNN and Binarized DNNs (i.e., BNN), that can be combined with LiM to provide the heterogeneous flexible architecture envisioned as the long-term goal for ubiquitous and pervasive AI

Analog Spiking Neuromorphic Circuits and Systems for Brain- and Nanotechnology-Inspired Cognitive Computing

Human society is now facing grand challenges to satisfy the growing demand for computing power, at the same time, sustain energy consumption. By the end of CMOS technology scaling, innovations are required to tackle the challenges in a radically different way. Inspired by the emerging understanding of the computing occurring in a brain and nanotechnology-enabled biological plausible synaptic plasticity, neuromorphic computing architectures are being investigated. Such a neuromorphic chip that combines CMOS analog spiking neurons and nanoscale resistive random-access memory (RRAM) using as electronics synapses can provide massive neural network parallelism, high density and online learning capability, and hence, paves the path towards a promising solution to future energy-efficient real-time computing systems. However, existing silicon neuron approaches are designed to faithfully reproduce biological neuron dynamics, and hence they are incompatible with the RRAM synapses, or require extensive peripheral circuitry to modulate a synapse, and are thus deficient in learning capability. As a result, they eliminate most of the density advantages gained by the adoption of nanoscale devices, and fail to realize a functional computing system. This dissertation describes novel hardware architectures and neuron circuit designs that synergistically assemble the fundamental and significant elements for brain-inspired computing. Versatile CMOS spiking neurons that combine integrate-and-fire, passive dense RRAM synapses drive capability, dynamic biasing for adaptive power consumption, in situ spike-timing dependent plasticity (STDP) and competitive learning in compact integrated circuit modules are presented. Real-world pattern learning and recognition tasks using the proposed architecture were demonstrated with circuit-level simulations. A test chip was implemented and fabricated to verify the proposed CMOS neuron and hardware architecture, and the subsequent chip measurement results successfully proved the idea. The work described in this dissertation realizes a key building block for large-scale integration of spiking neural network hardware, and then, serves as a step-stone for the building of next-generation energy-efficient brain-inspired cognitive computing systems

Розроблення методу образних перетворень для мінімізації булевих функцій в імплікативному базисі

This paper reports a study that has established the possibility of reducing computational complexity while improving the productivity of simplification of Boolean functions in the class of perfect implied normal forms (PINF-1 and PINF-2) using a method of figurative transformations.The method of figurative transformations has been expanded to cover the process of simplifying the functions of the implicative basis by using the developed algebra of the implicative basis in the form of rules that simplify the PINF-1 and PINF-2 functions of the implicative basis. A special feature in simplifying the functions of the implicative basis on the binary structures of 2-(n, b)-designs) is the use of analogs of perfect disjunctive normal forms (PDNF) and perfect conjunctive normal forms (PCNF) of Boolean functions. The specified forms of the functions define transformation rules for the functions of the implicative basis on binary structures.It is shown that the perfect implicative normal form of n-place function of the implicative basis can be represented by the binary sets or a matrix. Logical operations over the structure of the matrix ensure the result from simplifying the functions of the implicative basis. This makes it possible to focus the minimization principle within the truth table of the assigned function and avoid auxiliary objects such as Carnot map, Weich charts, etc.The method under consideration makes it possible:– to reduce the algorithmic complexity of PINF-1 and PINF-2 simplification;– to improve the performance of simplifying the functions of the implied basis by 100‒200 %;– to visualize the process of PINF-1 or PINF-2 minimization;There is reason to argue that minimizing the functions of the implicative basis using a method of figurative transformations brings the task of PINF-1 and PINF-2 minimization to the level of well-researched problems within the class of disjunctive-conjunctive normal forms of Boolean functionsПроведенными исследованиями установлена возможность уменьшения вычислительной сложности, увеличения производительности упрощения булевых функций в классе совершенных импликативных нормальных форм (СИНФ-1 и СИНФ-2) методом образных преобразований.Распространение метода образных преобразований на процесс упрощения функций импликативного базиса осуществлено с помощью разработанной алгебры импликативного базиса в виде правил упрощения СИНФ-1 и СИНФ-2 функций импликативного базиса. Особенностью упрощения функций импликативного базиса на бинарных структурах 2-(n, b)-блок-схем (англ. 2-(n, b)-designs) является использование аналогов совершенных дизьюктивных нормальных форм (СДНФ) и совершенных конъюктивных нормальных форм (ДКНФ) булевых функций. Указанные формы функций определяют правила преобразования на бинарных структурах функций импликативного базиса.Показано, что совершенную импликативную нормальную форму n-местной функции импликативного базиса можно подать бинарными наборами или матрицей. Логические операции над структурой матрицы обеспечивают результат упрощения функций импликативного базиса. Это позволяет сосредоточить принцип минимизации в пределах таблицы истинности данной функции и обойтись без вспомогательных объектов, таких как карта Карно, диаграммы Вейча и др.Рассмотренный метод позволяет:– уменьшить алгоритмическую сложность упрощения СИНФ-1 и СИНФ-2;– увеличить производительность упрощения функций импликативного базиса на 100–200 %;– демонстрировать наглядность процесса минимизации СИНФ-1 или СИНФ-2;Есть основания утверждать, что минимизация функций импликативного базиса методом образных преобразований выводит проблему минимизации СИНФ-1 и СИНФ-2 на уровень хорошо исследованных задач в классе дизъюнктивно-конъюнктивные нормальных форм булевых функцийПроведеними дослідженнями встановлена можливість зменшення обчислювальної складності, збільшення продуктивності спрощення булевих функцій у класі досконалих імплікативних нормальних форм (ДІНФ-1 та ДІНФ-2) методом образних перетворень.Поширення методу образних перетворень на процес спрощення функцій імплікативного базису здійснено за допомогою розробленої алгебри імплікативного базису у вигляді правил спрощення ДІНФ-1 та ДІНФ-2 функцій імплікативного базису. Особливістю спрощення функцій імплікативного базису на бінарних структурах 2-(n, b)-блок-схем (англ. 2-(n, b)-designs) є використання аналогів досконалих диз’юктивних нормальних форм (ДДНФ) та досконалих кон’юктивних нормальних форм (ДКНФ) булевих функцій. Зазначені форми функцій визначають правила перетворення на бінарних структурах функцій імплікативного базису.Показано, що досконалу імплікативну нормальну форму n-місткої функції імплікативного базису можна подати бінарними наборами або матрицею. Логічні операції над структурою матриці забезпечують результат спрощення функцій імплікативного базису. Це дозволяє зосередити принцип мінімізації у межах таблиці істинності заданої функції та обійтись без допоміжних об’єктів, як то карта Карно, діаграми Вейча та ін.Розглянутий метод дозволяє:– зменшити алгоритмічну складність спрощення ДІНФ-1 та ДІНФ-2;– збільшити продуктивність спрощення функцій імплікативного базису на 100–200 %;– демонструвати наочність процесу мінімізації ДІНФ-1 або ДІНФ-2;Є підстави стверджувати, що мінімізація функцій імплікативного базису методом образних перетворень виводить проблему мінімізації ДІНФ-1 та ДІНФ-2 на рівень добре досліджених задач у класі диз’юнктивно-кон’юнктивних нормальних форм булевих функці

Organic electrochemical networks for biocompatible and implantable machine learning: Organic bioelectronic beyond sensing

How can the brain be such a good computer? Part of the answer lies in the astonishing number of neurons and synapses that process electrical impulses in parallel. Part of it must be found in the ability of the nervous system to evolve in response to external stimuli and grow, sharpen, and depress synaptic connections. However, we are far from understanding even the basic mechanisms that allow us to think, be aware, recognize patterns, and imagine. The brain can do all this while consuming only around 20 Watts, out-competing any human-made processor in terms of energy-efficiency. This question is of particular interest in a historical era and technological stage where phrases like machine learning and artificial intelligence are more and more widespread, thanks to recent advances produced in the field of computer science. However, brain-inspired computation is today still relying on algorithms that run on traditional silicon-made, digital processors. Instead, the making of brain-like hardware, where the substrate itself can be used for computation and it can dynamically update its electrical pathways, is still challenging. In this work, I tried to employ organic semiconductors that work in electrolytic solutions, called organic mixed ionic-electronic conductors (OMIECs) to build hardware capable of computation. Moreover, by exploiting an electropolymerization technique, I could form conducting connections in response to electrical spikes, in analogy to how synapses evolve when the neuron fires. After demonstrating artificial synapses as a potential building block for neuromorphic chips, I shifted my attention to the implementation of such synapses in fully operational networks. In doing so, I borrowed the mathematical framework of a machine learning approach known as reservoir computing, which allows computation with random (neural) networks. I capitalized my work on demonstrating the possibility of using such networks in-vivo for the recognition and classification of dangerous and healthy heartbeats. This is the first demonstration of machine learning carried out in a biological environment with a biocompatible substrate. The implications of this technology are straightforward: a constant monitoring of biological signals and fluids accompanied by an active recognition of the presence of malign patterns may lead to a timely, targeted and early diagnosis of potentially mortal conditions. Finally, in the attempt to simulate the random neural networks, I faced difficulties in the modeling of the devices with the state-of-the-art approach. Therefore, I tried to explore a new way to describe OMIECs and OMIECs-based devices, starting from thermodynamic axioms. The results of this model shine a light on the mechanism behind the operation of the organic electrochemical transistors, revealing the importance of the entropy of mixing and suggesting new pathways for device optimization for targeted applications

The Fuzziness in Molecular, Supramolecular, and Systems Chemistry

Fuzzy Logic is a good model for the human ability to compute words. It is based on the theory of fuzzy set. A fuzzy set is different from a classical set because it breaks the Law of the Excluded Middle. In fact, an item may belong to a fuzzy set and its complement at the same time and with the same or different degree of membership. The degree of membership of an item in a fuzzy set can be any real number included between 0 and 1. This property enables us to deal with all those statements of which truths are a matter of degree. Fuzzy logic plays a relevant role in the field of Artificial Intelligence because it enables decision-making in complex situations, where there are many intertwined variables involved. Traditionally, fuzzy logic is implemented through software on a computer or, even better, through analog electronic circuits. Recently, the idea of using molecules and chemical reactions to process fuzzy logic has been promoted. In fact, the molecular word is fuzzy in its essence. The overlapping of quantum states, on the one hand, and the conformational heterogeneity of large molecules, on the other, enable context-specific functions to emerge in response to changing environmental conditions. Moreover, analog input–output relationships, involving not only electrical but also other physical and chemical variables can be exploited to build fuzzy logic systems. The development of “fuzzy chemical systems” is tracing a new path in the field of artificial intelligence. This new path shows that artificially intelligent systems can be implemented not only through software and electronic circuits but also through solutions of properly chosen chemical compounds. The design of chemical artificial intelligent systems and chemical robots promises to have a significant impact on science, medicine, economy, security, and wellbeing. Therefore, it is my great pleasure to announce a Special Issue of Molecules entitled “The Fuzziness in Molecular, Supramolecular, and Systems Chemistry.” All researchers who experience the Fuzziness of the molecular world or use Fuzzy logic to understand Chemical Complex Systems will be interested in this book