3,746 research outputs found

    Placement and Routing in 3D Integrated Circuits

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    In-Mold Assembly of Multi-Functional Structures

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    Combining the recent advances in injection moldable polymer composites with the multi-material molding techniques enable fabrication of multi-functional structures to serve multiple functions (e.g., carry load, support motion, dissipate heat, store energy). Current in-mold assembly methods, however, cannot be simply scaled to create structures with miniature features, as the process conditions and the assembly failure modes change with the feature size. This dissertation identifies and addresses the issues associated with the in-mold assembly of multi-functional structures with miniature components. First, the functional capability of embedding actuators is developed. As a part of this effort, computational modeling methods are developed to assess the functionality of the structure with respect to the material properties, process parameters and the heat source. Using these models, the effective material thermal conductivity required to dissipate the heat generated by the embedded small scale actuator is identified. Also, the influence of the fiber orientation on the heat dissipation performance is characterized. Finally, models for integrated product and process design are presented to ensure the miniature actuator survivability during embedding process. The second functional capability developed as a part of this dissertation is the in-mold assembly of multi-material structures capable of motion and load transfer, such as mechanisms with compliant hinges. The necessary hinge and link design features are identified. The shapes and orientations of these features are analyzed with respect to their functionality, mutual dependencies, and the process cost. The parametric model of the interface design is developed. This model is used to minimize both the final assembly weight and the mold complexity as the process cost measure. Also, to minimize the manufacturing waste and the risk of assembly failure due to unbalanced mold filling, the design optimization of runner systems used in multi-cavity molds for in-mold assembly is developed. The complete optimization model is characterized and formulated. The best method to solve the runner optimization problem is identified. To demonstrate the applicability of the tools developed in this dissertation towards the miniaturization of robotic devices, a case study of a novel miniature air vehicle drive mechanism is presented

    Power and Thermal Management of System-on-Chip

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    Integrated Modeling of Process, Structures and Performance in Cast Parts

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    Multiscale structural, thermal and thermo-structural optimization towards three-dimensional printable structures

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    This thesis develops a robust framework for the multiscale design of three-dimensional lattices with macroscopically tailored structural and thermal characteristics. The work exploits the high process flexibility and precision of additive manufacturing to the physical realization of complex microstructure of metamaterials by developing and implementing a multiscale approach. Structures derived from such metamaterials exhibit properties which differ from that of the constituent base material. Inspired by the concept of Free Material Optimization (FMO), a periodic microscale model is developed whose geometric parameterization enables smoothly changing properties and for which the connectivity of neighbouring microstructures in the large-scale domain is guaranteed by slowly changing large-scale descriptions of the lattice parameters. The microscale model is evaluated at full factorial design points to discretely populate material property spaces. A property point is fully defined for a micro-architecture when its elasticity matrix, thermal conductivity matrix and volume fraction is determined. The process of property-space population is facilitated by leveraging the existence of micro-architecture symmetries so that there exists a 95% reduction in the simulations required despite a full-factorial design of experiments. The discrete property evaluations are converted to continuous functions by response surface modelling so that the properties exist as continuous functions of the micro-architecture geometry parameters. A lattice-based functional grading of material is derived using the finite element method. The optimization is driven by a chain-rule combination of sensitivities derived by the adjoint method and sensitivities derived from explicit material property expressions. The novelty of the work lies in the use of multiple geometry-based small-scale design parameters for optimization problems in three-dimensional real space. The approach is demonstrated by solving structural, thermal and thermo-structural optimization problems. The results show designs with improved optimality compared to commonly implemented optimization methodologies. The optimal designs obtained are physically realizable by additive manufacturing techniques.Open Acces

    Constraint-Aware, Scalable, and Efficient Algorithms for Multi-Chip Power Module Layout Optimization

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    Moving towards an electrified world requires ultra high-density power converters. Electric vehicles, electrified aerospace, data centers, etc. are just a few fields among wide application areas of power electronic systems, where high-density power converters are essential. As a critical part of these power converters, power semiconductor modules and their layout optimization has been identified as a crucial step in achieving the maximum performance and density for wide bandgap technologies (i.e., GaN and SiC). New packaging technologies are also introduced to produce reliable and efficient multichip power module (MCPM) designs to push the current limits. The complexity of the emerging MCPM layouts is surpassing the capability of a manual, iterative design process to produce an optimum design with agile development requirements. An electronic design automation tool called PowerSynth has been introduced with ongoing research toward enhanced capabilities to speed up the optimized MCPM layout design process. This dissertation presents the PowerSynth progression timeline with the methodology updates and corresponding critical results compared to v1.1. The first released version (v1.1) of PowerSynth demonstrated the benefits of layout abstraction, and reduced-order modeling techniques to perform rapid optimization of the MCPM module compared to the traditional, manual, and iterative design approach. However, that version is limited by several key factors: layout representation technique, layout generation algorithms, iterative design-rule-checking (DRC), optimization algorithm candidates, etc. To address these limitations, and enhance PowerSynth’s capabilities, constraint-aware, scalable, and efficient algorithms have been developed and implemented. PowerSynth layout engine has evolved from v1.3 to v2.0 throughout the last five years to incorporate the algorithm updates and generate all 2D/2.5D/3D Manhattan layout solutions. These fundamental changes in the layout generation methodology have also called for updates in the performance modeling techniques and enabled exploring different optimization algorithms. The latest PowerSynth 2 architecture has been implemented to enable electro-thermo-mechanical and reliability optimization on 2D/2.5D/3D MCPM layouts, and set up a path toward cabinet-level optimization. PowerSynth v2.0 computer-aided design (CAD) flow has been hardware-validated through manufacturing and testing of an optimized novel 3D MCPM layout. The flow has shown significant speedup compared to the manual design flow with a comparable optimization result

    MLCAD: A Survey of Research in Machine Learning for CAD Keynote Paper

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    A framework for fine-grain synthesis optimization of operational amplifiers

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    This thesis presents a cell-level framework for Operational Amplifiers Synthesis (OASYN) coupling both circuit design and layout. For circuit design, the tool applies a corner-driven optimization, accounting for on-chip performance variations. By exploring the process, voltage, and temperature variations space, the tool extracts design worst case solution. The tool undergoes sensitivity analysis along with Pareto-optimality to achieve required specifications. For layout phase, OASYN generates a DRC proved automated layout based on a sized circuit-level description. Morata et al. (1996) introduced an elegant representation of block placement called sequence pair for general floorplans (SP). Like TCG and BSG, but unlike O-tree, B*tree, and CBL, SP is P-admissible. Unlike SP, TCG supports incremental update during operation and keeps the information of the boundary modules as well as their relative positions in the representation. Block placement algorithms that are based on SP use heuristic optimization algorithms, e.g., simulated annealing where generation of large number of sequence pairs are required. Therefore a fast algorithm is needed to generate sequence pairs after each solution perturbation. The thesis presents a new simple and efficient O(n) runtime algorithm for fast realization of incremental update for cost evaluation. The algorithm integrates sequence pair and transitive closure graph advantages into TCG-S* a superior topology update scheme which facilitates the search for optimum desired floorplan. Experiments show that TCG-S* is better than existing works in terms of area utilization and convergence speed. Routing-aware placement is implemented in OASYN, handling symmetry constraints, e.g., interdigitization, common centroid, along with congestion elimination and the enhancement of placement routability
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