Signal Processing for Caching Networks and Non-volatile Memories

The recent information explosion has created a pressing need for faster and more reliable data storage and transmission schemes. This thesis focuses on two systems: caching networks and non-volatile storage systems. It proposes network protocols to improve the efficiency of information delivery and signal processing schemes to reduce errors at the physical layer as well. This thesis first investigates caching and delivery strategies for content delivery networks. Caching has been investigated as a useful technique to reduce the network burden by prefetching some contents during o˙-peak hours. Coded caching [1] proposed by Maddah-Ali and Niesen is the foundation of our algorithms and it has been shown to be a useful technique which can reduce peak traffic rates by encoding transmissions so that different users can extract different information from the same packet. Content delivery networks store information distributed across multiple servers, so as to balance the load and avoid unrecoverable losses in case of node or disk failures. On one hand, distributed storage limits the capability of combining content from different servers into a single message, causing performance losses in coded caching schemes. But, on the other hand, the inherent redundancy existing in distributed storage systems can be used to improve the performance of those schemes through parallelism. This thesis proposes a scheme combining distributed storage of the content in multiple servers and an efficient coded caching algorithm for delivery to the users. This scheme is shown to reduce the peak transmission rate below that of state-of-the-art algorithms

Everlasting Secrecy by Exploiting Eavesdropper\u27s Receiver Non-Idealities

This dissertation focuses on secrecy, which is a primary concern in modern communication. Secrecy has traditionally been obtained by cryptography, which is based on assumptions on current and future computational capabilities of the eavesdropper. However, there are numerous examples of cryptographic schemes being broken that were supposedly secure, often when the signal was recorded by the adversary for later processing. This motivates seeking types of secrecy that are provably everlasting for sensitive applications. The desire for such everlasting security suggests considering information-theoretic approaches, where the eavesdropper cannot extract any information about the secret message from the received signal. However, since the location and channel state information of a passive eavesdropper is generally unknown, it is challenging to know whether the advantage required to achieve information-theoretic security for a given scenario is provided, and thus attempting to obtain information-theoretic security via commonly-envisioned approaches leads to a significant risk in wireless communication. In this dissertation, we present a new perspective on how to generate the necessary information-theoretic advantage required for secret communication in the wireless environment. The proposed technique does not rely on the channel between the transmitter and the eavesdropper\u27s receiver because we exploit receiver\u27s processing effects for security. In particular, we attack the eavesdropper\u27s analog-to-digital (A/D) converter to generate the advantage required to obtain information-theoretic secrecy, as follows. Based on a key pre-shared between the legitimate nodes that only needs to be kept secret during transmission (and we pessimistically assume it will be handed to the adversary immediately afterward) we insert intentional distortion on the transmitted signal. Since the intended recipient of the signal knows the key and hence the distortion, it can undo the distortion before his/her A/D, whereas the eavesdropper must store the signal in memory and try to compensate for the distortion after the A/D conversion. Since the A/D is necessarily a non-linear component of the receiver, the operations are not necessarily commutative and there is the potential for information-theoretic security. This dissertation studies two practical instantiations of this approach to obtain everlasting secrecy against eavesdroppers with different hardware capabilities. As a first step, the transmitted signal is modulated by two vastly different power levels at the transmitter based on the key. Since the intended recipient knows the key, he/she can undo the power modulation before the A/D, putting the signal in the appropriate range for analog-to-digital conversion. The eavesdropper, on the other hand, must compromise between larger quantization noise and more A/D overflows, and thus will lose information required to recover the message. Hence, information-theoretic security is obtained. We show that this method can provide information-theoretic secrecy even when the eavesdropper has perfect access to the output of the transmitter, and even when the eavesdropper has an A/D that has better quality than the legitimate receiver\u27s A/D. A risk of the power modulation approach is a sophisticated eavesdropper with multiple A/Ds. In our second approach, in order to attack such an eavesdropper, we introduce the idea of adding random jamming (based on the ephemeral key) to the signal. In this case the intended recipient can simply subtract off the jamming signal and its signal will be well-matched to the span of its A/D converter, while the eavesdropper has difficulty because it does not know the key during transmission: if it does not change the span of the A/D, it will lose information due to A/D overflows, and, if it enlarges the span of the A/D to cover all possible received signal values, the width of each quantization level will be increased, and thus the eavesdropper will lose information due to high quantization noise. Hence, the desired advantage for information-theoretic secrecy is obtained. Finally, we study the combination of random jamming and frequency hopping in wideband channels, and show that considering the current fundamental limits of analog-to-digital conversion, this method can provide everlasting secrecy in wireless environments against any eavesdropper

Information fusion architectures for security and resource management in cyber physical systems

Data acquisition through sensors is very crucial in determining the operability of the observed physical entity. Cyber Physical Systems (CPSs) are an example of distributed systems where sensors embedded into the physical system are used in sensing and data acquisition. CPSs are a collaboration between the physical and the computational cyber components. The control decisions sent back to the actuators on the physical components from the computational cyber components closes the feedback loop of the CPS. Since, this feedback is solely based on the data collected through the embedded sensors, information acquisition from the data plays an extremely vital role in determining the operational stability of the CPS. Data collection process may be hindered by disturbances such as system faults, noise and security attacks. Hence, simple data acquisition techniques will not suffice as accurate system representation cannot be obtained. Therefore, more powerful methods of inferring information from collected data such as Information Fusion have to be used. Information fusion is analogous to the cognitive process used by humans to integrate data continuously from their senses to make inferences about their environment. Data from the sensors is combined using techniques drawn from several disciplines such as Adaptive Filtering, Machine Learning and Pattern Recognition. Decisions made from such combination of data form the crux of information fusion and differentiates it from a flat structured data aggregation. In this dissertation, multi-layered information fusion models are used to develop automated decision making architectures to service security and resource management requirements in Cyber Physical Systems --Abstract, page iv

New VLSI design of a MAP/BCJR decoder.

Any communication channel suffers from different kinds of noises. By employing forward error correction (FEC) techniques, the reliability of the communication channel can be increased. One of the emerging FEC methods is turbo coding (iterative coding), which employs soft input soft output (SISO) decoding algorithms like maximum a posteriori (MAP) algorithm in its constituent decoders. In this thesis we introduce a design with lower complexity and less than 0.1dB performance loss compare to the best performance observed in Max-Log-MAP algorithm. A parallel and pipeline design of a MAP decoder suitable for ASIC (Application Specific Integrated Circuits) is used to increase the throughput of the chip. The branch metric calculation unit is studied in detail and a new design with lower complexity is proposed. The design is also flexible to communication block sizes, which makes it ideal for variable frame length communication systems. A new even-spaced quantization technique for the proposed MAP decoder is utilized. Normalization techniques are studied and a suitable technique for the Max-Log-MAP decoder is explained. The decoder chip is synthesized and implemented in a 0.18 mum six-layer metal CMOS technology. (Abstract shortened by UMI.)Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis2004 .S23. Source: Masters Abstracts International, Volume: 43-05, page: 1783. Adviser: Majid Ahmadi. Thesis (M.A.Sc.)--University of Windsor (Canada), 2004

Content delivery over multi-antenna wireless networks

The past few decades have witnessed unprecedented advances in information technology, which have significantly shaped the way we acquire and process information in our daily lives. Wireless communications has become the main means of access to data through mobile devices, resulting in a continuous exponential growth in wireless data traffic, mainly driven by the demand for high quality content. Various technologies have been proposed by researchers to tackle this growth in 5G and beyond, including the use of increasing number of antenna elements, integrated point-to-multipoint delivery and caching, which constitute the core of this thesis. In particular, we study non-orthogonal content delivery in multiuser multiple-input-single-output (MISO) systems. First, a joint beamforming strategy for simultaneous delivery of broadcast and unicast services is investigated, based on layered division multiplexing (LDM) as a means of superposition coding. The system performance in terms of minimum required power under prescribed quality-of-service (QoS) requirements is examined in comparison with time division multiplexing (TDM). It is demonstrated through simulations that the non-orthogonal delivery strategy based on LDM significantly outperforms the orthogonal strategy based on TDM in terms of system throughput and reliability. To facilitate efficient implementation of the LDM-based beamforming design, we further propose a dual decomposition-based distributed approach. Next, we study an efficient multicast beamforming design in cache-aided multiuser MISO systems, exploiting proactive content placement and coded delivery. It is observed that the complexity of this problem grows exponentially with the number of subfiles delivered to each user in each time slot, which itself grows exponentially with the number of users in the system. Therefore, we propose a low-complexity alternative through time-sharing that limits the number of subfiles that can be received by a user in each time slot. Moreover, a joint design of content delivery and multicast beamforming is proposed to further enhance the system performance, under the constraint on maximum number of subfiles each user can decode in each time slot. Finally, conclusions are drawn in Chapter 5, followed by an outlook for future works.Open Acces

Hardware implementation aspects of polar decoders and ultra high-speed LDPC decoders

The goal of channel coding is to detect and correct errors that appear during the transmission of information. In the past few decades, channel coding has become an integral part of most communications standards as it improves the energy-efficiency of transceivers manyfold while only requiring a modest investment in terms of the required digital signal processing capabilities. The most commonly used channel codes in modern standards are low-density parity-check (LDPC) codes and Turbo codes, which were the first two types of codes to approach the capacity of several channels while still being practically implementable in hardware. The decoding algorithms for LDPC codes, in particular, are highly parallelizable and suitable for high-throughput applications. A new class of channel codes, called polar codes, was introduced recently. Polar codes have an explicit construction and low-complexity encoding and successive cancellation (SC) decoding algorithms. Moreover, polar codes are provably capacity achieving over a wide range of channels, making them very attractive from a theoretical perspective. Unfortunately, polar codes under standard SC decoding cannot compete with the LDPC and Turbo codes that are used in current standards in terms of their error-correcting performance. For this reason, several improved SC-based decoding algorithms have been introduced. The most prominent SC-based decoding algorithm is the successive cancellation list (SCL) decoding algorithm, which is powerful enough to approach the error-correcting performance of LDPC codes. The original SCL decoding algorithm was described in an arithmetic domain that is not well-suited for hardware implementations and is not clear how an efficient SCL decoder architecture can be implemented. To this end, in this thesis, we re-formulate the SCL decoding algorithm in two distinct arithmetic domains, we describe efficient hardware architectures to implement the resulting SCL decoders, and we compare the decoders with existing LDPC and Turbo decoders in terms of their error-correcting performance and their implementation efficiency. Due to the ongoing technology scaling, the feature sizes of integrated circuits keep shrinking at a remarkable pace. As transistors and memory cells keep shrinking, it becomes increasingly difficult and costly (in terms of both area and power) to ensure that the implemented digital circuits always operate correctly. Thus, manufactured digital signal processing circuits, including channel decoder circuits, may not always operate correctly. Instead of discarding these faulty dies or using costly circuit-level fault mitigation mechanisms, an alternative approach is to try to live with certain malfunctions, provided that the algorithm implemented by the circuit is sufficiently fault-tolerant. In this spirit, in this thesis we examine decoding of polar codes and LDPC codes under the assumption that the memories that are used within the decoders are not fully reliable. We show that, in both cases, there is inherent fault-tolerance and we also propose some methods to reduce the effect of memory faults on the error-correcting performance of the considered decoders