11 research outputs found
NASA high performance computing and communications program
The National Aeronautics and Space Administration's HPCC program is part of a new Presidential initiative aimed at producing a 1000-fold increase in supercomputing speed and a 100-fold improvement in available communications capability by 1997. As more advanced technologies are developed under the HPCC program, they will be used to solve NASA's 'Grand Challenge' problems, which include improving the design and simulation of advanced aerospace vehicles, allowing people at remote locations to communicate more effectively and share information, increasing scientist's abilities to model the Earth's climate and forecast global environmental trends, and improving the development of advanced spacecraft. NASA's HPCC program is organized into three projects which are unique to the agency's mission: the Computational Aerosciences (CAS) project, the Earth and Space Sciences (ESS) project, and the Remote Exploration and Experimentation (REE) project. An additional project, the Basic Research and Human Resources (BRHR) project exists to promote long term research in computer science and engineering and to increase the pool of trained personnel in a variety of scientific disciplines. This document presents an overview of the objectives and organization of these projects as well as summaries of individual research and development programs within each project
Interpreting the Performance of HPF/Fortran 90D
In this paper we present a novel interpretive approach for accurate and cost-effective performance prediction in a high performance computing environment, and describe the design of a source-driven HPF/Fortran 90D performance prediction framework based on this approach. The performance prediction framework has been implemented as part of a HPF/Fortran 90D application development environment. A set of benchmarking kernels and application codes are used to validate the accuracy, utility, usability, and cost-effectiveness of the performance prediction framework. The use of the framework for selecting appropriate compiler directives and for application performance debugging is demonstrated. Keywords: Performance prediction, HPF/Fortran 90D application development, System & Application characterization
Digital signal conditioning on multiprocessor systems
An important application area of modem computer systems is that of digital signal processing. This discipline is concerned with the analysis or modification of digitally represented signals, through the use of simple mathematical operations. A primary need of such systems is that of high data throughput. Although optimised programmable processors are available, system designers are now looking towards parallel processing to gain further performance increases. Such parallel systems may be easily constructed using the transputer family of processors. However, although these devices are comparatively easy to program, they possess a general von Neumann core and so are relatively inefficient at implementing digital signal processing algorithms. The power of the transputer lies in its ability to communicate effectively, not in its computational capability. The converse is true of specialised digital signal processors. These devices have been designed specifically to implement the type of small data intensive operations required by digital signal processing algorithms, but have not been designed to operate efficiently in a multiprocessor environment. This thesis examines the performance of both types of processors with reference to a common signal processing application, multichannel filtering. The transputer is examined in both uniprocessor and multiprocessor configurations, and its performance analysed. A theoretical model of program behaviour is developed, in order to assess the performance benefits of particular code structures and the effects of such parameters as data block size. The transputer implementation is contrasted with that of the Motorola DSP56001 digital signal processor. This device is found to be much more efficient at implementing such algorithms on a single device, but provides limited multiprocessor support. Using the conclusions of this assessment, a hybrid multiprocessor has been designed. This consists of a transputer controlling a number of signal processors, communicating through shared memory, separating tiie tasks of computation and communication. Forcing the transputer to communicate through shared memory causes problems, and these have been addressed. A theoretical performance model of the system has been produced. A small system has been constructed, and is currently running performance test software
A Parallel Processor System for Nuclear Shell-Model Calculations
This thesis describes the design and implementation of a dedicated parallel processor system for nuclear shell-model calculations. The purpose of these calculations is to determine nuclear energy eigenvalues by the tridiagonalisation of the nuclear Hamiltonian matrix using the Lanczos method. The Theoretical Nuclear Structure group at Glasgow University's Physics Department would normally perform this type of calculation on a high-performance main-frame computer. However these machines have limitations which restrict the number and scope of the calculations that can be performed. The Shell Model Processor system consists of a Multiple Microprocessor Unit (MMPU) driven by a highly pipelined dedicated front-end processor. The MMPU has a modular, moderately coupled, MIMD architecture based on autonomous processing modules. The elements within the system communicate via three shared buses. The front-end is responsible for determining the position of non-zero elements within the Hamiltonian matrix. Once the position of an element has been found it is passed to one of the free processing modules within the MMPU. The processing module then determines the value of the matrix element and performs the appropriate arithmetic to accumulate the resultant Lanczos vector. Two such processing modules have been developed. The most recently developed module is based on two MC68000 16/32 bit microprocessors. In addition there are two supervisory processor modules, one of which controls the front-end and also assists it in its function. The other module has privileged system capabilities and is responsible for supervising the system as a whole. The system has been successfully tested and performance figures are presented. The future expansion of the system to allow it to perform larger calculations is also discussed
Extending functional databases for use in text-intensive applications
This thesis continues research exploring the benefits of using functional
databases based around the functional data model for advanced database
applications-particularly those supporting investigative systems. This is a
growing generic application domain covering areas such as criminal and military
intelligence, which are characterised by significant data complexity, large data
sets and the need for high performance, interactive use. An experimental
functional database language was developed to provide the requisite semantic
richness. However, heavy use in a practical context has shown that language
extensions and implementation improvements are required-especially in the
crucial areas of string matching and graph traversal. In addition, an
implementation on multiprocessor, parallel architectures is essential to meet the
performance needs arising from existing and projected database sizes in the
chosen application area. [Continues.
Compiling for parallel multithreaded computation on symmetric multiprocessors
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.Includes bibliographical references (p. 145-149).by Andrew Shaw.Ph.D
Cumulative index to NASA Tech Briefs, 1986-1990, volumes 10-14
Tech Briefs are short announcements of new technology derived from the R&D activities of the National Aeronautics and Space Administration. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This cumulative index of Tech Briefs contains abstracts and four indexes (subject, personal author, originating center, and Tech Brief number) and covers the period 1986 to 1990. The abstract section is organized by the following subject categories: electronic components and circuits, electronic systems, physical sciences, materials, computer programs, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences
ΠΠΎΠ²ΡΠ΅ ΠΈΠ½ΡΠΎΡΠΌΠ°ΡΠΈΠΎΠ½Π½ΡΠ΅ ΡΠ΅Ρ Π½ΠΎΠ»ΠΎΠ³ΠΈΠΈ Π² ΠΈΡΡΠ»Π΅Π΄ΠΎΠ²Π°Π½ΠΈΠΈ ΡΠ»ΠΎΠΆΠ½ΡΡ ΡΡΡΡΠΊΡΡΡ : ΠΌΠ°ΡΠ΅ΡΠΈΠ°Π»Ρ Π΄Π²Π΅Π½Π°Π΄ΡΠ°ΡΠΎΠΉ ΠΊΠΎΠ½ΡΠ΅ΡΠ΅Π½ΡΠΈΠΈ Ρ ΠΌΠ΅ΠΆΠ΄ΡΠ½Π°ΡΠΎΠ΄Π½ΡΠΌ ΡΡΠ°ΡΡΠΈΠ΅ΠΌ 4-8 ΠΈΡΠ½Ρ 2018 Π³.
ΠΠ²Π΅Π½Π°Π΄ΡΠ°ΡΠ°Ρ ΠΊΠΎΠ½ΡΠ΅ΡΠ΅Π½ΡΠΈΡ Ρ ΠΌΠ΅ΠΆΠ΄ΡΠ½Π°ΡΠΎΠ΄Π½ΡΠΌ ΡΡΠ°ΡΡΠΈΠ΅ΠΌ Β«ΠΠΎΠ²ΡΠ΅ ΠΈΠ½ΡΠΎΡΠΌΠ°ΡΠΈΠΎΠ½Π½ΡΠ΅ ΡΠ΅Ρ
Π½ΠΎΠ»ΠΎΠ³ΠΈΠΈ Π² ΠΈΡΡΠ»Π΅Π΄ΠΎΠ²Π°Π½ΠΈΠΈ ΡΠ»ΠΎΠΆΠ½ΡΡ
ΡΡΡΡΠΊΡΡΡΒ» Π±ΡΠ»Π° ΠΏΡΠΎΠ²Π΅Π΄Π΅Π½Π° Π² ΠΏΠΎΡΠ΅Π»ΠΊΠ΅ ΠΠ°ΡΡΠ½Ρ ΠΠ»ΡΠ°ΠΉΡΠΊΠΎΠ³ΠΎ ΠΊΡΠ°Ρ Ρ 4 ΠΏΠΎ 8 ΠΈΡΠ½Ρ 2018 Π³. ΠΠ°ΡΠ΅ΡΠΈΠ°Π»Ρ ΡΠ±ΠΎΡΠ½ΠΈΠΊΠ° ΠΎΡΠΈΠ΅Π½ΡΠΈΡΠΎΠ²Π°Π½Ρ Π½Π° ΠΈΡΠΏΠΎΠ»ΡΠ·ΠΎΠ²Π°Π½ΠΈΠ΅ ΡΠΏΠ΅ΡΠΈΠ°Π»ΠΈΡΡΠ°ΠΌΠΈ Π² ΠΎΠ±Π»Π°ΡΡΠΈ ΠΈΠ½ΡΠΎΡΠΌΠ°ΡΠΈΠΎΠ½Π½ΡΡ
ΡΠ΅Ρ
Π½ΠΎΠ»ΠΎΠ³ΠΈΠΉ Π² ΡΠ°Π·Π»ΠΈΡΠ½ΡΡ
ΡΡΠ΅ΡΠ°Ρ
ΡΠ΅Π»ΠΎΠ²Π΅ΡΠ΅ΡΠΊΠΎΠΉ Π΄Π΅ΡΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ, Π²ΠΊΠ»ΡΡΠ°Ρ Π²ΡΡΠΈΡΠ»ΠΈΡΠ΅Π»ΡΠ½ΡΠ΅ ΠΈ ΡΠ΅Π»Π΅ΠΊΠΎΠΌΠΌΡΠ½ΠΈΠΊΠ°ΡΠΈΠΎΠ½Π½ΡΠ΅ ΡΠΈΡΡΠ΅ΠΌΡ, ΠΎΠ±ΡΠ°Π·ΠΎΠ²Π°Π½ΠΈΠ΅, Π°ΡΡ
ΠΈΡΠ΅ΠΊΡΡΡΡ ΠΈ Π³ΡΠ°Π΄ΠΎΡΡΡΠΎΠΈΡΠ΅Π»ΡΡΡΠ²ΠΎ, ΠΎΡ
ΡΠ°Π½Ρ ΠΏΡΠΈΡΠΎΠ΄Ρ, Π·Π΄ΡΠ°Π²ΠΎΠΎΡ
ΡΠ°Π½Π΅Π½ΠΈΠ΅, ΡΠ°Π·ΡΠ°Π±ΠΎΡΠΊΡ ΡΠΈΡΡΠ΅ΠΌ ΠΈΡΠΊΡΡΡΡΠ²Π΅Π½Π½ΠΎΠ³ΠΎ ΠΈΠ½ΡΠ΅Π»Π»Π΅ΠΊΡΠ°, ΠΈΡΡΠ»Π΅Π΄ΠΎΠ²Π°Π½ΠΈΠ΅ Π΄ΠΈΡΠΊΡΠ΅ΡΠ½ΡΡ
ΠΈ ΡΡΠΎΡ
Π°ΡΡΠΈΡΠ΅ΡΠΊΠΈΡ
ΡΡΡΡΠΊΡΡΡ ΡΠΏΡΠ°Π²Π»Π΅Π½ΠΈΡ ΠΈ ΡΠ²ΡΠ·ΠΈ.ΠΠ° ΡΠΈΡ. Π». Π»ΠΎΠ³ΠΎΡΠΈΠΏ 140 Π»Π΅Ρ Π’Π