Translation of APL to other high-level languages

The thesis describes a method of translating the computer language APL to other high-level languages. Particular reference is made to FORTRAN, a language widely available to computer users. Although gaining in popularity, APL is not at present so readily available, and the main aim of the translation process is to enable the more desirable features of APL to be at the disposal of a far greater number of users. The translation process should also speed up the running of routines, since compilation in general leads to greater efficiency than interpretive techniques. Some inefficiencies of the APL language have been removed by the translation process. The above reasons for translating APL to other high-level languages are discussed in the introduction to the thesis. A description of the method of translation forms the main part of the thesis. The APL input code is first lexically scanned, a process whereby the subsequent phases are greatly simplified. An intermediate code form is produced in which bracketing is used to group operators and operands together, and to assign priorities to operators such that sub-expressions will be handled in the correct order. By scanning the intermediate code form, information is stacked until required later. The information is used to make possible a process of macro expansion. Each of the above processes is discussed in the main text of the thesis. The format of all information which can or must be supplied at translation time is clearly outlined in the text

HS 1700+6416: the first high redshift non lensed NAL-QSO showing variable high velocity outflows

We present a detailed analysis of the X-ray emission of HS 1700+6416, a high redshift (z=2.7348), luminous quasar, classified as a Narrow Absorption Line (NAL) quasar on the basis of its SDSS spectrum. The source has been observed 9 times by Chandra and once by XMM from 2000 to 2007. Long term variability is clearly detected, between the observations, in the 2-10 keV flux varying by a factor of three (~3-9x10^-14 erg s^-1 cm^-2) and in the amount of neutral absorption (Nh < 10^22 cm^-2 in 2000 and 2002 and Nh=4.4+-1.2x10^22 cm^-2 in 2007). Most interestingly, one broad absorption feature is clearly detected at 10.3+-0.7 keV (rest frame) in the 2000 Chandra observation, while two similar features, at 8.9+-0.4 and at 12.5+-0.7 keV, are visible when the 8 contiguous Chandra observations of 2007 are stacked together. In the XMM observation of 2002, strongly affected by background flares, there is a hint for a similar feature at 8.0+-0.3 keV. We interpreted these features as absorption lines from a high velocity, highly ionized (i.e. Fe XXV, FeXXVI) outflowing gas. In this scenario, the outflow velocities inferred are in the range v=0.12-0.59c. To reproduce the observed features, the gas must have high column density (Nh>3x10^23 cm^-2), high ionization parameter (log(xi)>3.3 erg cm s^-1) and a large range of velocities (Delta V~10^4 km s^-1). This Absorption Line QSO is the fourth high-z quasar displaying X-ray signatures of variable, high velocity outflows, and among these, is the only one non-lensed. A rough estimate of the minimum kinetic energy carried by the wind of up to 18% L(bol), based on a biconical geometry of the wind, implies that the amount of energy injected in the outflow environment is large enough to produce effective mechanical feedback.Comment: 10 pages, 6 figures. Accepted for publication in Astronomy and Astrophysic

Development of an FPGA-based gate signal generator for a multilevel inverter

The application of Field Programmable Gate Array (FPGA) in the development of power electronics circuits control scheme has drawn much attention lately due to its shorter design cycle, lower cost and higher density. This paper presents an FPGA-based gate signal generator for a multilevel inverter employing an online optimal PWM switching strategy to control its output voltage. FPGA is chosen for the hardware implementation of the switching strategy mainly due to its high computation speed that can ensure the accuracy of the instants that gating signals are generated. The gate signal generator has been realized by an FPGA (FLEXlOKZO) from Altera. The design and development of the FPGA based gate signal generator is described in detail. Results from the timing simulation using MAX+PLUSII software are given and verified by the results obtained from the FLEXlOK2O output