Nano-Watt Modular Integrated Circuits for Wireless Neural Interface.

In this work, a nano-watt modular neural interface circuit is proposed for ECoG neuroprosthetics. The main purposes of this work are threefold: (1) optimizing the power-performance of the neural interface circuits based on ECoG signal characteristics, (2) equipping a stimulation capability, and (3) providing a modular system solution to expand functionality. To achieve these aims, the proposed system introduces the following contributions/innovations: (1) power-noise optimization based on the ECoG signal driven analysis, (2) extreme low-power analog front-ends, (3) Manchester clock-edge modulation clock data recovery, (4) power-efficient data compression, (5) integrated stimulator with fully programmable waveform, (6) wireless signal transmission through skin, and (7) modular expandable design. Towards these challenges and contributions, three different ECoG neural interface systems, ENI-1, ENI-16, and ENI-32, have been designed, fabricated, and tested. The first ENI system(ENI-1) is a one-channel analog front-end and fabricated in a 0.25µm CMOS process with chopper stabilized pseudo open-loop preamplifier and area-efficient SAR ADC. The measured channel power, noise and area are 1.68µW at 2.5V power-supply, 1.69µVrms (NEF=2.43), and 0.0694mm^2, respectively. The fabricated IC is packaged with customized miniaturized package. In-vivo human EEG is successfully measured with the fabricated ENI-1-IC. To demonstrate a system expandability and wireless link, ENI-16 IC is fabricated in 0.25µm CMOS process and has sixteen channels with a push-pull preamplifier, asynchronous SAR ADC, and intra-skin communication(ISCOM) which is a new way of transmitting the signal through skin. The measured channel power, noise and area are 780nW, 4.26µVrms (NEF=5.2), and 2.88mm^2, respectively. With the fabricated ENI-16-IC, in-vivo epidural ECoG from monkey is successfully measured. As a closed-loop system, ENI-32 focuses on optimizing the power performance based on a bio-signal property and integrating stimulator. ENI-32 is fabricated in 0.18µm CMOS process and has thirty-two recording channels and four stimulation channels with a cyclic preamplifier, data compression, asymmetric wireless transceiver (Tx/Rx). The measured channel power, noise and area are 140nW (680nW including ISCOM), 3.26µVrms (NEF=1.6), and 5.76mm^2, respectively. The ENI-32 achieves an order of magnitude power reduction while maintaining the system performance. The proposed nano-watt ENI-32 can be the first practical wireless closed-loop solution with a practically miniaturized implantable device.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/98064/1/schang_1.pd

Integrated Circuits for Programming Flash Memories in Portable Applications

Smart devices such as smart grids, smart home devices, etc. are infrastructure systems that connect the world around us more than before. These devices can communicate with each other and help us manage our environment. This concept is called the Internet of Things (IoT). Not many smart nodes exist that are both low-power and programmable. Floating-gate (FG) transistors could be used to create adaptive sensor nodes by providing programmable bias currents. FG transistors are mostly used in digital applications like Flash memories. However, FG transistors can be used in analog applications, too. Unfortunately, due to the expensive infrastructure required for programming these transistors, they have not been economical to be used in portable applications. In this work, we present low-power approaches to programming FG transistors which make them a good candidate to be employed in future wireless sensor nodes and portable systems. First, we focus on the design of low-power circuits which can be used in programming the FG transistors such as high-voltage charge pumps, low-drop-out regulators, and voltage reference cells. Then, to achieve the goal of reducing the power consumption in programmable sensor nodes and reducing the programming infrastructure, we present a method to program FG transistors using negative voltages. We also present charge-pump structures to generate the necessary negative voltages for programming in this new configuration

Subthreshold design of ultra low-power analog modules

Il consumo di potenza rappresenta l’indicatore chiave delle performance di recenti applicazioni portatili, come dispositivi medici impiantabili o tag RFID passivi, allo scopo di aumentare, rispettivamente, i tempi di funzionamento o i range operativi. La riduzione della tensione di alimentazione si è dimostrata l’approccio migliore per ridurre il consumo di potenza dei sistemi digitali integrati. Al fine di tenere il passo con la riduzione delle tensioni di alimentazione, anche le sezioni analogiche dei sistemi mixed signal devono essere in grado di funzionare con livelli di tensione molto bassi. Di conseguenza, sono richieste nuove metodologie di progettazione analogica e configurazioni circuitali innovative in grado di lavorare con tensioni di alimentazioni bassissime, dissipando una potenza estremamente bassa. Il regime di funzionamento sottosoglia consente di ridurre notevolmente le tensioni applicabili ai dispositivi ed si contraddistingue per i livelli di corrente molto bassi, rispetto al ben noto funzionamento in forte inversione. Queste due caratteristiche sono state sfruttate nella realizzazione di moduli analogici di base ultra low voltage, low power. Tre nuove architetture di riferimenti di tensione, che lavorano con tutti i transistor polarizzati in regime sottosoglia, sono stati fabbricati in tecnologia CMOS 0.18 μm. I tre circuiti si basano sullo stesso principio di funzionamento per compensare gli effetti della variazione della temperatura sulla tensione di riferimento generata. Tramite il principio di funzionamento proposto, la tensione di riferimento può essere approssimata con la differenza delle tensioni di soglia, a temperatura ambiente, dei transistor. Misure sperimentali sono state effettuate su set con più di 30 campioni per ogni configurazione circuitale. Una dettagliata analisi statistica ha dimostrato un consumo medio di potenza che va da pochi nano watt a poche decine di nano watt, mentre la minima tensione di alimentazione, raggiunta da una delle tre configurazioni, è di soli 0.45 V. Le tensioni di riferimento generate sono molto precise rispetto alle variazioni della temperatura e della tensione di alimentazione, infatti sono stati ottenuti coefficienti di temperatura e line sensitivity medi a partire rispettivamente da 165 ppm/°C e 0.065 %/V. Inoltre, è stata trattata anche la progettazione di amplificatori ultra low voltage, low power. Sono state illustrate linee guida dettagliate per la progettazione di amplificatori sottosoglia e le stesse sono state applicate per la realizzazione di un amplificatore a due stadi, con compensazione di Miller, funzionante con una tensione di alimentazione di 0.5 V. I risultati sperimentali dell’op amp proposto, fabbricato in tecnologia CMOS 0.18 μm, hanno mostrato un guadagno DC ad anello aperto di 70 dB, un prodotto banda guadagno di 18 kHz ed un consumo di potenza di soli 75 nW. I risultati delle misure sperimentali dimostrano che gli amplificatori operazionali in sottosoglia rappresentano una soluzione molto interessante nella realizzazione di applicazioni efficienti in termini energetici per gli attuali sistemi elettronici portatili. Dal confronto con amplificatori ultra low power, low voltage presenti in letteratura, si evince che la soluzione proposta offre un miglior compromesso tra velocità, potenza dissipata e capacità di carico

CMOS Integrated Circuits for RF-powered Wireless Temperature Sensor

This dissertation presents original research contributions in the form of twelve scientific publications that represent advances related to RF-to-DC converters, reference circuits (voltage, current and frequency) and temperature sensors. The primary focus of this research was to design efficient and low power CMOS-based circuit components, which are useful in various blocks of an RF-powered wireless sensor node.  The RF-to-DC converter or rectifier converts RF energy into DC energy, which is utilized by the sensor node. In the implementation of a CMOS-based RF-to-DC converter, the threshold voltage of MOS transistors mainly affects the conversion efficiency. Hence, for the first part of this research, different threshold voltage compensation schemes were developed for the rectifiers. These schemes were divided into two parts; first, the use of the MOSFET body terminal biasing technique and second, the use of an auxiliary circuit to obtain threshold voltage compensation. In addition to these schemes, the use of an alternate signaling scheme for voltage multiplier configuration of differential input RF-harvesters has also been investigated.  A known absolute value of voltage or current is the most useful for an integrated circuit. Thus, the circuit which generates the absolute value of voltage or current is cited as the voltage or current reference circuit respectively. Hence, in the second part of the research, simple, low power and moderately accurate, voltage and current reference circuits were developed for the power management unit of the sensor node. Besides voltage and current reference circuits, a frequency reference circuit was also designed. The use of the frequency reference circuit is in the digital processing and timing functions of the sensor node.  In the final part of the research, temperature sensing was selected as an application for the sensor node. Here, voltage and current based sensor cores were developed to sense the temperature. A smart temperature sensor was designed by using the voltage cores to obtain temperature information in terms of the duty-cycle. Similarly, the temperature equivalent current was converted into the frequency to obtain a temperature equivalent output signal.  All these implementations were done by using two integrated circuits which were fabricated during the year 2013-14.

Disseny microelectrnic de circuits discriminadors de polsos pel detector LHCb

The aim of this thesis is to present a solution for implementing the front end system of the Scintillator Pad Detector (SPD) of the calorimeter system of the LHCb experiment that will start in 2008 at the Large Hadron Collider (LHC) at CERN. The requirements of this specific system are discussed and an integrated solution is presented, both at system and circuit level. We also report some methodological achievements. In first place, a method to study the PSRR (and any transfer function) in fully differential circuits taking into account the effect of parameter mismatch is proposed. Concerning noise analysis, a method to study time variant circuits in the frequency domain is presented and justified. This would open the possibility to study the effect of 1/f noise in time variants circuits. In addition, it will be shown that the architecture developed for this system is a general solution for front ends in high luminosity experiments that must be operated with no dead time and must be robust against ballistic deficit

Projeto de referência de tensão subbandgap

A referência de tensão é um circuito muito relevante por fornecer sua tensão de saída para diversos circuitos analógicos, sinais mistos e digitais, além de ter sido um importante tópico de estudo em circuitos integrados por mais de 50 anos. Uma referência de tensão deve providenciar uma tensão estável com baixa sensibilidade à variações na temperatura, tensão de alimentação, características de processo de fabricação e estresses no encapsulamento, além de outros parâmetros específicos de cada aplicação. Esse tipo de circuito funciona com o cancelamento da dependência térmica entre duas grandezas elétricas, normalmente implementados pela soma ponderada de dois efeitos físicos independentes com dependências térmicas opostas. Circuitos denominados bandgap empregam a deriva térmica negativa de uma junção semicondutora para gerar a grandeza elétrica com dependência complementar à temperatura absoluta, enquanto o potencial térmico, advindo da constante de Boltzmann e da carga do elétron, normalmente é utilizado para gerar a grandeza elétrica com dependência proporcional à temperatura absoluta. Considerando que essas grandezas também dependem do processo de fabricação, o desempenho de referência é muito impactado pela variabilidade de fabricação. Um projeto que apresente robustez à variabilidade é mandatório para aumentar a precisão do circuito. Consequentemente, este trabalho apresenta o projeto de uma referência de tensão subbandgap de baixa variabilidade comportamental. Foi implementada uma fonte de corrente ISQ para a polarização de todos os blocos do circuito com uma corrente que apresenta baixa variabilidade comportamental. Foram implementados Self-Cascode MOSFET (SCM) e Pares Diferenciais Desbalanceados para a geração de tensões proporcionais à temperatura absoluta. As topologias empregadas são descritas analiticamente e o modelo ACM foi utilizado durante o projeto. O circuito é formando somente por transistores no processo de fabricação de 180 nm CMOS da XFAB. As simulações realizadas em schematic view resultaram em uma tensão de referência de 738 mV apresentando TC médio de 37,6 ppm/ C, consumindo 8,809 μV em uma tensão de alimentação de 1,8 V. Simulações Monte Carlo foram conduzidas para avaliar o comportamento do circuito frente à variabilidade comportamental, apresentando resultados comparáveis à artigos publicados em convenções internacionais.The voltage reference is a very relevant circuit for providing its output voltage to many analog, mixed-signal and digital circuits, and has been an important topic of study in integrated circuits for more than 50 years. A voltage reference must provide a stable voltage with low sensitivity to variations in temperature, supply voltage, manufacturing process characteristics and package stresses, as well as other application-specific parameters. This type of circuit works by canceling the thermal dependence between two electrical quantities, usually implemented by the weighted sum of two independent physical effects with opposite thermal dependencies. Circuits called bandgap employ the negative thermal drift of a semiconductor junction to generate the electric quantity with complementary temperature dependence, while the thermal potential, related from the Boltzmann’s constant and the electron charge, is normally used to generate the proportional term. Since these quantities are also dependent on the fabrication process, the reference performance is greatly impacted by fabrication variability. Reduction or a design that exhibits robustness to variability is mandatory to increase the circuit accuracy. Hence, this paper presents the design of a subbandgap voltage reference with low behavioral variability. An ISQ current source was implemented for biasing all the circuit blocks with a current that exhibits low behavioral variability. Self-Cascode MOSFET (SCM) and Unbalanced Differential Pairs were implemented for the generation proportional to absolute temperature terms. The topologies employed are described analytically and the ACM model was used during the design. The circuit is formed only by transistors in XFAB’s 180 nM CMOS manufacturing process. Simulations performed in schematic view resulted in a reference voltage of 738 mV showing average TC of 37,6 ppm/ C, consuming 8,809 μV at a supply voltage of 1,8 V. Monte Carlo simulations were conducted to evaluate the circuit behavior against behavioral variability, presenting results comparable to papers published in international conventions

Biomedical Engineering

Biomedical engineering is currently relatively wide scientific area which has been constantly bringing innovations with an objective to support and improve all areas of medicine such as therapy, diagnostics and rehabilitation. It holds a strong position also in natural and biological sciences. In the terms of application, biomedical engineering is present at almost all technical universities where some of them are targeted for the research and development in this area. The presented book brings chosen outputs and results of research and development tasks, often supported by important world or European framework programs or grant agencies. The knowledge and findings from the area of biomaterials, bioelectronics, bioinformatics, biomedical devices and tools or computer support in the processes of diagnostics and therapy are defined in a way that they bring both basic information to a reader and also specific outputs with a possible further use in research and development

Self-powered Time-Keeping and Time-of-Occurrence Sensing

Self-powered and passive Internet-of-Things (IoT) devices (e.g. RFID tags, financial assets, wireless sensors and surface-mount devices) have been widely deployed in our everyday and industrial applications. While diverse functionalities have been implemented in passive systems, the lack of a reference clock limits the design space of such devices used for applications such as time-stamping sensing, recording and dynamic authentication. Self-powered time-keeping in passive systems has been challenging because they do not have access to continuous power sources. While energy transducers can harvest power from ambient environment, the intermittent power cannot support continuous operation for reference clocks. The thesis of this dissertation is to implement self-powered time-keeping devices on standard CMOS processes. In this dissertation, a novel device that combines the physics of quantum tunneling and floating-gate (FG) structures is proposed for self-powered time-keeping in CMOS process. The proposed device is based on thermally assisted Fowler-Nordheim (FN) tunneling process across high-quality oxide layer to discharge the floating-gate node, therefore resulting in a time-dependent FG potential. The device was fully characterized in this dissertation, and it does not require external powering during runtime, making it feasible for passive devices and systems. Dynamic signature based on the synchronization and desynchronization behavior of the FN timer is proposed for authentication of IoT devices. The self-compensating physics ensure that when distributed timers are subjected to identical environment variances that are common-mode noise, they can maintain synchronization with respect to each other. On the contrary, different environment conditions will desynchronize the timers creating unique signatures. The signatures could be used to differentiate between products that belong to different supply-chains or products that were subjected to malicious tampering. SecureID type dynamic authentication protocols based on the signature generated by the FN timers are proposed and they are proven to be robust to most attacks. The protocols are further analyzed to be lightweight enough for passive devices whose computational sources are limited. The device could also be applied for self-powered sensing of time-of-occurrence. The prototype was verified by integrating the device with a self-powered mechanical sensor to sense and record time-of-occurrence of mechanical events. The system-on-chip design uses the timer output to modulate a linear injector to stamp the time information into the sensing results. Time-of-occurrence can be reconstructed by training the mathematical model and then applying that to the test data. The design was verified to have a high reconstruction accuracy