Harmonic reduction using Particle Swarm Optimization based SHE Modulation Technique in Asymmetrical DC-AC Converter

Many inverters play an important role in transmitting and processing energy to power system networks. To reduce the cost and size of multilevel inverters, various topologies have been included in the literature. But these topologies do not look at the complete harmonic distortion in the output waveform. In this study, a modern multilevel inverter structure, a mutated H-bridge inverter is adopted that demands a small amount of switches, driver circuits, power diodes and DC voltage sources compared to conventional multilevel inverters to produce the required level in the output voltage. The mutated H-bridge converter uses a nearest-level control method, produces high value of total harmonic at the output voltage and low-level harmonics content is also high, which is more dangerous than high-order harmonics. Therefore, the selective harmonic elimination (SHE) method is used to reduce the low frequency harmonics and the total harmonic distortion to the output voltage. Comparison of complete harmonic deviation and low-level harmonic content using the above-mentioned control strategies on the 31-level inverter is presented. Simulation studies confirm the performance of a 31-level inverter with low-order harmonics and a complete harmonic distortion using the SHE process. The effectiveness and accuracy of the SHE in producing 31 level waveform is demonstrated by utilizing the test outcomes and the THD found is of the order of 2.8%, 1.7%, 1.7% and 1% for the modulation index values of 0.5590, 0.7440, and 0.8380 and 0.9110 respectively

Direct control of D-STATCOM based on 23-level cascaded multilevel inverter using harmonics elimination pulse width modulation

The distribution static synchronous compensator (D-STATCOM) is primarily used for solving power quality problems. Normally, the phase-shifted pulse width modulation (PS-PWM) switching is employed in conjunction with the direct control of the D-STATCOM. However, the PS-PWM exhibits high switching losses. To alleviate this problem, a direct control scheme for D-STATCOM based on the harmonic elimination PWM (HEPWM) switching is developed. Due to the difficulty in solving the equations for the HEPWM angles, no work is reported on the direct control for a multilevel voltage source inverter (MVSI) D-STATCOM with more than 15-levels. Thus, the main contribution of the work is the application of HEPWM for 23-level cascaded MVSI using a wide modulation index (MI) range (i.e. 5.40 – 8.15 p.u). The main motivation to utilize the high number of level is to allow for the output voltage of the D-STATCOM to be sufficiently high, thus avoiding the use of step-up transformer. Furthermore, the achieved MI keeps the total harmonic distortion of the MVSI output voltage below the IEEE 519 Standard (5%) over the entire operating range. The eleven HEPWM switching angles were computed using an optimization technique, known as the differential evolution. Since the angles were computed offline, they were retrieved from a look-up table whenever the output voltage of the MVSI was to be constructed. The HEPWM-based direct control was benchmarked against the popular PS-PWM using ± 6.5MVAr/11kV D-STATCOM modelled in MATLAB-Simulink and PLECS software. For the same switching frequency, the proposed HEPWM switching exhibited superior harmonic spectra, hence had lower losses. Furthermore, the size of the series coupling inductor can be reduced to at least half. Dynamically, the steady state value of the reactive current was reached in less than one mains cycle when a transition from the full inductive to full capacitive modes was imposed. In addition, the proposed D-STATCOM controller mitigated the swell and sag problems in less than one cycle

Swarm Optimization-Based Modified Selective Harmonic Elimination PWM Technique Application in Symmetrical H-Bridge Type Multilevel Inverters

The problem of elimination of harmonics and the need of a large number of switches in multilevel inverters (MLIs) have been a hot topic of research over the last decades. In this paper, a new variant swarm optimization (SO) based selective harmonic elimination (SHE) technique is described to minimize harmonics in MLIs, which is a complex optimization problem involving non-linear transcendental equation. Optimum switching angles are calculated by the proposed algorithms considering minimum total harmonic distortion (THD) and the best results are taken for controlling the operation of MLIs. The performance of the proposed algorithm is compared with the genetic algorithm (GA). Conventional MLIs have some disadvantages such as the requirement of a large number of circuit components, complex control, and voltage balancing problems. A novel seven-level reduced switch multilevel inverter (RS MLI) is proposed in this paper to recoup the need of a large number of switches. Matlab/Simulink software is used for the simulation of two symmetrical topologies, i.e., a seven-level cascaded H-bridge multilevel inverter (CHB MLI) and a seven-level (RS MLI). Simulation results are validated by developing a prototype of both MLIs. The enhancement of the output voltage waveform confirms the effectiveness of the proposed SO SHE approach

SELECCIÓN DE ÁNGULOS DE CONMUTACIÓN PARA UN INVERSOR MULTINIVEL EN CASCADA USANDO UN ALGORITMO DE BÚSQUEDA ALEATORIA (SWITCHING ANGLES SELECTION FOR A CASCADED MULTILEVEL INVERTER USING A RANDOM SEARCH ALGORITHM)

Resumen Un inversor de cascada trifásico H-Bridge de varios niveles en condiciones de fallo de un solo interruptor puede funcionar como un inversor asimétrico aplicando un cambio en la estrategia de modulación para mejorar su rendimiento. Este documento presenta el Algoritmo de Búsqueda Aleatoria aplicado a la modulación de Eliminación Selectiva de Armónicos para Inversores de Cascada Multinivel Asimétricos. El algoritmo propuesto tiene por objeto encontrar una solución óptima a un conjunto de ecuaciones trascendentales, que garantizan la eliminación de armónicos no deseados y el control de la magnitud de la componente fundamental de la tensión generada por el inversor. Además, el algoritmo propuesto se comparó con el algoritmo de optimización de enjambre de partículas y la estrategia tradicional de eliminación selectiva de armónicos. Los resultados comparativos obtenidos mostraron que la técnica de modulación que usa la técnica Algoritmo de Búsqueda Aleatoria es la más adecuada para el inversor multinivel trifásico de siete niveles (caso de estudio). Palabras Clave: Algoritmo de búsqueda aleatoria, Eliminación selectiva de armónicos, Estrategia de tolerancia a fallos, Inversor de modulación de ancho de pulso, Inversor multinivel. Abstract A three-phase H-Bridge multi-level cascade inverter under Single-Switch Fault Condition can operate as an asymmetrical inverter by applying a change in the modulation strategy to improve its performance. This paper presents the Random Search Algorithm applied to the modulation of Selective Harmonic Elimination for Asymmetric Cascade Multilevel Inverters. The proposed algorithm aims to find an optimal solution to a set of transcendental equations, which guarantee the elimination of undesired harmonics and controlling the magnitude of the fundamental component of the voltage generated by the inverter. In addition, the proposed algorithm was compared with the Particle Swarm Optimization algorithm and the traditional selective harmonic elimination strategy. The comparative results obtained showed that the modulation technique using the Random Search Algorithm technique is the most suitable for the seven-level three-phase multilevel inverter (case study). Keywords: Fault Tolerant Strategy, Pulse Width Modulation inverter, Random Search Algorithm, Selective Harmonic Elimination, Multilevel inverter

A Real-Time and Closed-Loop Control Algorithm for Cascaded Multilevel Inverter Based on Artificial Neural Network

In order to control the cascaded H-bridges (CHB) converter with staircase modulation strategy in a real-time manner, a real-time and closed-loop control algorithm based on artificial neural network (ANN) for three-phase CHB converter is proposed in this paper. It costs little computation time and memory. It has two steps. In the first step, hierarchical particle swarm optimizer with time-varying acceleration coefficient (HPSO-TVAC) algorithm is employed to minimize the total harmonic distortion (THD) and generate the optimal switching angles offline. In the second step, part of optimal switching angles are used to train an ANN and the well-designed ANN can generate optimal switching angles in a real-time manner. Compared with previous real-time algorithm, the proposed algorithm is suitable for a wider range of modulation index and results in a smaller THD and a lower calculation time. Furthermore, the well-designed ANN is embedded into a closed-loop control algorithm for CHB converter with variable direct voltage (DC) sources. Simulation results demonstrate that the proposed closed-loop control algorithm is able to quickly stabilize load voltage and minimize the line current’s THD (<5%) when subjecting the DC sources disturbance or load disturbance. In real design stage, a switching angle pulse generation scheme is proposed and experiment results verify its correctness

Single phase asymmetrical multilevel inverter topology with reduced device count

Multilevel Inverters (MLIs) are vital components for medium voltage and high-power applications. However, the number of components will increase with increased output voltage levels. It leads to high power losses. In this thesis, a new single-phase asymmetrical multilevel inverter topology used for medium and high voltage applications is proposed. The topology is capable of producing n-level output voltage with reduced device counts. It is achieved by arranging available switches and direct current (dc)-sources to obtain the maximum combinations of addition and subtraction of the input dc-sources. A comprehensive literature review has been carried out, and the proposed topology is compared with the topologies available in the literature. Comparison based on the number of switches utilized, the number of dc sources used, and the total number of devices is made. To verify the viability of the proposed topology, circuit models for 9-level, 25-level, and 67-level inverters are developed and simulated in Matlab-Simulink software first. Voltage and current waveforms and THD for resistive and inductive loads are obtained from the simulation model and validated with the experimental setup. Experimental results of the proposed inverter prototype for 9-level and 25-level output, developed in the laboratory, are presented. A low-frequency and high-frequency switching strategy for the proposed inverter topology are also presented in this work. Thermal modelling of the proposed topology is done in PLECS software, and detailed loss analysis for 9-level as well as 25-level topologies is carried out. The fundamental topology utilizes 9 switches with a total standing voltage (TSV) of 6.75 per unit while the 25-level topology structure has 12 switches with the TSV of 6.92 per unit only. Comparison with the other multilevel topologies shows that the proposed circuit requires fewer power switches and dc-sources to produce the same output levels. Due to the low switching frequency requirement, the proposed topology is applicable for high and medium voltage applications, resulting in lower switching losses