CORDIC algorithm and it’s applications in DSP

OBJECTIVE: The digital signal processing landscape has long been dominated by the microprocessors with enhancements such as single cycle multiply-accumulate instructions and special addressing modes. While these processors are low cost and offer extreme flexibility, they are often not fast enough for truly demanding DSP tasks. The advent of reconfigurable logic computers permits the higher speeds of dedicated hardware solutions at costs that are competitive with the traditional software approach. Unfortunately algorithms optimized for these microprocessors based systems do not map well into hardware. While hardware efficient solutions often exist, the dominance of the software systems has kept these solutions out of the spotlight. Among these hardware- efficient algorithms is a class of iterative solutions for trigonometric and other transcendental functions that use only shifts and adds to perform. The trigonometric functions are based on vector rotations, while other functions such as square root are implemented using an incremental expression of the desired function. The trigonometric algorithm is called CORDIC an acronym for Coordinate Rotation Digital Computer. The incremental functions are performed with a very simple extension to the hardware architecture and while not CORDIC in the strict sense, are often included because of the close similarity. The CORDIC algorithms generally produce one additional bit of accuracy for each iteration. DESCRIPTION: A detailed study on various modes of CORDIC algorithm is done. First of all a study is made how the CORDIC algorithm is derived from the general vector equation. Then a study is done regarding the various modes of the CORDIC algorithm and how it can be used to find the sine, cosine, tan and logarithm functions, its use in conversion of coordinate systems. An attempt is made to carry out a rigorous study of its use in DSP oriented applications AND how it has revolutionized the DSP scenario. Finally simulations are carried out using MATLAB to support the purpose of our study. RESULTS The results clearly bring out the advantage of using CORDIC algorithm. First of all the sine and cosine of any angle could be found out easily. Similar is the case of logarithm and hyperbolic functions. The simulation results prove the fact that the hardware complexity gets reduced by using the CORDIC algorithm. A large no of plots were obtained for different 7 functions. Finally the implementation in DCT was carried out and the results obtained were in line with those of the theoretical values. CONCLUSION The CORDIC algorithms presented in this paper are well known in the research and super computing circles. Here the basic CORDIC algorithm and a partial list of potential applications of potential applications of a CORDIC based processor array to digital signal processing is presented. The CORDIC based DCT architecture for low power design has been proposed. The proposed multiplierless CORDIC based DCT architecture produces high throughput and is easy to implementing VLSI. The proposed architecture reduced the input data range for the CORDIC processor by split and the no of compensation iterations in CORDIC based DCT computation by utilizing that most images have similar neighboring pixels. The project also shows that a tool is available for use in FPGA based computing machines, which are the likely basis for the next generation DSP systems

A fast CORDIC co-processor architecture for digital signal processing applications

The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de Procesadore

A study and comparison of COordinate Rotation DIgital Computer (CORDIC) architectures

Most of the digital signal processing applications performs operations like multiplication, addition, square-root calculation, solving linear equations etc. The physical implementation of these operations consumes a lot of hardware and, software implementation consumes large memory. Even if they are implemented in hardware, they do not provide high speed, and due to this reason, even today the software implementation dominates hardware. For realizing operations from basic to very complex ones with less hardware, a Co-ordinate Rotation Digital Computer (CORDIC) proves beneficial. It is capable of performing mathematical operations right from addition to highly complex functions with the help of arithmetic unit and shifters only. This paper gives a brief overview of various existing CORDIC architectures, their working principle, application domain and a comparison of these architectures. Different designs are available as per the target, i.e. high accuracy and precision, low area, low latency, hardware efficient, low power, reconfigurability, etc. that can be used as per the application in which the architecture needs to be employed

A fast CORDIC co-processor architecture for digital signal processing applications

The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de ProcesadoresRed de Universidades con Carreras en Informática (RedUNCI

An approach to the application of shift-and-add algorithms on engineering and industrial processes

Different kinds of algorithms can be chosen so as to compute elementary functions. Among all of them, it is worthwhile mentioning the shift-and-add algorithms due to the fact that they have been specifically designed to be very simple and to save computer resources. In fact, almost the only operations usually involved with these methods are additions and shifts, which can be easily and efficiently performed by a digital processor. Shift-and-add algorithms allow fairly good precision with low cost iterations. The most famous algorithm belonging to this type is CORDIC. CORDIC has the capability of approximating a wide variety of functions with only the help of a slight change in their iterations. In this paper, we will analyze the requirements of some engineering and industrial problems in terms of type of operands and functions to approximate. Then, we will propose the application of shift-and-add algorithms based on CORDIC to these problems. We will make a comparison between the different methods applied in terms of the precision of the results and the number of iterations required.This research was supported by the Conselleria de Educacion of the Valencia Region Government under grant number GV/2011/043

A spectral estimation toolkit for Java applications

AbstractThis paper examines the capability, performance, and relevance of a high-performance advanced signal processing toolkit in Java, a programming language for Web-based applications. To demonstrate the simplicity, ease, and application use of the toolkit, a spectral estimation applet has been developed in the Java environment using advanced Internet technologies such as Remote Method Invocation (RMI). This application provides an interactive and visual approach in understanding theoretical concepts of advanced signal processing methods and shows the need to create more application applets to better understand additional concepts in signal and image processing. Furthermore, a toolkit with limited functionality and different framework has been developed for embedded and handheld devices such as cellular phones and palm pilots. This toolkit is also shown to be useful in developing applications MIDlets on those devices

FPGA-BASED IMPLEMENTATION OF DUAL-FREQUENCY PATTERN SCHEME FOR 3-D SHAPE MEASUREMENT

Structured Light Illumination (SLI) is the process where spatially varied patterns are projected onto a 3-D surface and based on the distortion by the surface topology, phase information can be calculated and a 3D model constructed. Phase Measuring Profilometry (PMP) is a particular type of SLI that requires three or more patterns temporarily multiplexed. High speed PMP attempts to scan moving objects whose motion is small so as to have little impact on the 3-D model. Given that practically all machine vision cameras and high speed cameras employ a Field Programmable Gate Array (FPGA) interface directly to the image sensors, the opportunity exists to do the processing on camera. This thesis focuses on the design, implementation, testing, and evaluation of a camera-projector system to implement a PMP dual-frequency scheme for 3-D shape measurement on a single FPGA chip. The processor architecture is implemented and tested using the Xilinx Spartan 3 FPGA chip on an Opal Kelly development board. The hardware is described using VHDL and Verilog Hardware Description Languages (HDLs)