A Formal Algorithm for Routing Traces on a Printed Circuit Board

This paper addresses the classical problem of printed circuit board routing: that is, the problem of automatic routing by a computer other than by brute force that causes the execution time to grow exponentially as a function of the complexity. Most of the present solutions are either inexpensive but not efficient and fast, or efficient and fast but very costly. Many solutions are proprietary, so not much is written or known about the actual algorithms upon which these solutions are based. This paper presents a formal algorithm for routing traces on a print- ed circuit board. The solution presented is very fast and efficient and for the first time speaks to the question eloquently by way of symbolic statements

Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

Hydrothermally extracted nanohydroxyapatite from bovine bone as bioceramic and biofiller in bionanocomposite

Bones have an extraordinary capacity to restore and regenerate in case of minor injury. However, major injuries need orthopedic surgeries that required bone implant biomaterials. In this study, n-HAP powder was extracted from bovine bone by hydrothermal and calcined at different calcination temperatures (600-1100°C) without the use of solvents. The n-HAP powders produced were used to fabricate two types of biomaterials (HAP bioceramics and PLA/n-HAP bionanocomposite). The raw-HAP and calcined n-HAP powder samples were compacted into green bodies and were sintered at various temperatures (1000-1400°C) to produce HAP bioceramics. The best calcined n-HAP was mixed with PLA by melt mixing and injection moulding to fabricate PLA/n-HAP bionanocomposite. Characterizations of the n-HAP powder, n-HAP bioceramics and PLA/n-HAP bionanocomposite samples were done by Thermogravimetric analysis (TGA), X-ray diffraction (XRD), Fourier transforms infrared (FTIR), Field emission scanning electron microscopy (FESEM), Energy-dispersive x-ray spectroscopy (EDX), X-ray fluorescence (XRF) spectroscopy, universal testing machine (UTM) and melt flow index (MFI) analyses. TGA data revealed that n-HAP was thermally stable at 1300ºC. The extracted n-HAP powder was highly crystalline and crystallite size was in the range of 10-83 nm as confirmed by XRD. Density and hardness of the n-HAP bioceramics increased as sintering temperature increased and showing maximum values at a temperature of 1400°C. The results of PLA/n-HAP bionanocomposite revealed that the higher n-HAP loaded (at 5wt%), the lower the tensile strength of bionanocomposite due to poor interfacial adhesion. The interfacial adhesion was improved by loading of 1.0 wt% maleic anhydride (MAH) as a compatibilizer. The biocompatibility of bionanocomposite was evaluated in simulated body fluids (SBF). The results showed that apatite layers were grown on the surfaces of both biomaterials. Therefore, both biomaterials formulated shall be promising medical biomaterials for orthopedic applications

RAID-2: Design and implementation of a large scale disk array controller

We describe the implementation of a large scale disk array controller and subsystem incorporating over 100 high performance 3.5 inch disk drives. It is designed to provide 40 MB/s sustained performance and 40 GB capacity in three 19 inch racks. The array controller forms an integral part of a file server that attaches to a Gb/s local area network. The controller implements a high bandwidth interconnect between an interleaved memory, an XOR calculation engine, the network interface (HIPPI), and the disk interfaces (SCSI). The system is now functionally operational, and we are tuning its performance. We review the design decisions, history, and lessons learned from this three year university implementation effort to construct a truly large scale system assembly

Virtual lines, a deadlock free and real-time routing mechanism for ATM networks

In this paper we present a routing mechanism and buffer allocation mechanism for an ATM switching fabric. Since the fabric will be used to transfer multimedia traffic it should provide a guaranteed throughput and a bounded latency. We focus on the design of a suitable routing mechanism that is capable to fulfil these requirements and is free of deadlocks. We will describe two basic concepts that can be used to implement deadlock free routing. Routing of messages is closely related to buffering. We have organized the buffers into parallel fifos, each representing a virtual line. In this way we not only have solved the problem of Head Of Line blocking, but we can also give real-time guarantees. We will show that for local high-speed networks it is more advantageous to have a proper flow control than to have large buffers. Although the virtual line concept can have a low buffer utilization, the transfer efficiency can be higher. The virtual lines concept allows adaptive routing. The total throughput of the network can be improved by using alternative routes. Adaptive routing is attractive in networks where alternative routes are not much longer than the initial route(s). The network of the switching fabric is built up from switching elements interconnected in a Kautz topology

Design of a Base-Board for arrays of closely-packed Multi-Anode Photo-Multipliers

We describe the design of a Base-Board to house Multi-Anode Photo-Multipliers for use in large-area arrays of light sensors. The goals, the design, the results of tests on the prototypes and future developments are presented.Comment: 16 pages, 5 figures, submitted to Nucl. Instrum. and Meth.

The Outer Tracker Detector of the HERA-B Experiment. Part II: Front-End Electronics

The HERA-B Outer Tracker is a large detector with 112674 drift chamber channels. It is exposed to a particle flux of up to 2x10^5/cm^2/s thus coping with conditions similar to those expected for the LHC experiments. The front-end readout system, based on the ASD-8 chip and a customized TDC chip, is designed to fulfil the requirements on low noise, high sensitivity, rate tolerance, and high integration density. The TDC system is based on an ASIC which digitizes the time in bins of about 0.5 ns within a total of 256 bins. The chip also comprises a pipeline to store data from 128 events which is required for a deadtime-free trigger and data acquisition system. We report on the development, installation, and commissioning of the front-end electronics, including the grounding and noise suppression schemes, and discuss its performance in the HERA-B experiment