Study and application of direct RF power injection methodology and mitigation of electromagnetic interference in ADCs

There are many publications available in literature regarding the DPI (Direct Power Injection) technique for electronic systems, but few works specifically addressed for mixed-signal converters, which are components existent in almost all electronic devices. IEC 62132-4(International Electrotechnical Commission, 2006) and 62132-1(International Electrotechnical Commission, 2006) standards describe a method for measuring immunity of integrated circuits (IC) in the presence of conducted RF disturbances. This method ensures a high degree of repeatability and correlation of immunity measurements. Knowledge of the electromagnetic immunity of an IC allows the designer to decide if the system will need external protection, and how much effort should be directed to this solution. In this context, the purpose of this work is the study and application of the DPI methodology for injection of EMI in a mixed-signal programmable device, evaluating mitigation possibilities, with special focus on the analog-to-digital converters (ADCs). The main objective is to evaluate the impact of electromagnetic interference (EMI) on different converters (two Successive Approximation Register ADCs, operating with distinct sampling rate and a Sigma-Delta ADC) of the Cypress Semiconductor Programmable SoC (System-on-Chip), PSoC 5LP. Additionally a previously proposed fault tolerance methodology, based on triplication with hardware and time diversity is tested. Results show distinct behaviors of each converter to conducted EMI. Finally, the tested tolerance technique showed to be suitable to reduce error rate of such data acquisition system operating under EMI disturbance.Existem muitas publicações disponíveis na literatura sobre a técnica de DPI (Direct Power Injection ou injeção direta de energia) para sistemas eletrônicos, mas poucos trabalhos direcionados para conversores de sinais mistos, que são componentes existentes em quase todos os dispositivos eletrônicos. As normas IEC 62132-4 (IEC, 2006) e 62132-1 (IEC, 2006) descrevem um método para medir a imunidade de circuitos integrados (CI) na presença de distúrbios de RF conduzidos. Este método garante um alto grau de repetibilidade e correlação das medições da imunidade. O conhecimento da imunidade eletromagnética de um CI permite que o projetista decida se o sistema precisará de proteção externa e quanto esforço deve ser direcionado para esta solução. Nesse contexto, o objetivo deste trabalho é o estudo e aplicação da metodologia DPI para injeção de interferência eletromagnética em um dispositivo programável de sinal misto, avaliando as possibilidades de mitigação, com foco especial em conversores analógico-digitais (ADCs). O principal objetivo é avaliar o impacto da interferência eletromagnética em diferentes conversores (dois ADCs baseados em aproximação sucessiva, operando com taxa de amostragem distintas e um ADC do tipo Sigma-Delta) do SoC(System-on-Chip) programável da Cypress Semiconductor, PSoC 5LP. Além disso, é testada uma metodologia de tolerância a falhas proposta anteriormente, baseada em triplicação com diversidade de hardware e temporal. Os resultados mostram comportamentos distintos de cada conversor para a interferência eletromagnética conduzida. Finalmente, a técnica de tolerância testada mostrou-se adequada para reduzir a taxa de erros desse sistema de aquisição de dados operando sob perturbação eletromagnética

Measurement of Electromagnetic Interference Rejection Ratio for Precision Instrumentation Amplifiers

Electro-Magnetic Interference(EMI) degrades the perfomance of electronic systems. So, Amplifiers which are the basic building blocks used in the front-end of analog and mixed-signal Integrated Circuits (ICs) must be evaluated for EMI. This work introduces the most intriguing figure of merit, Electro-Magnetic Interference Rejection Ratio (EMIRR) to measure the EMI immunity of precision Instrumentation Amplifiers (INAs) that helps to select the EMI robust INAs for EMI critical applications. In this work, a new EMIRR measurement setup is implemented to measure the immunity of INAs for conducted EMI ranging from 10 MHz to 3 GHz. The shift in the DC offset voltage generated at the output of the INA due to RF rectification, is used to compute EMIRR. As part of the setup, the hardware evaluation board is designed and an automation test software is developed to run EMIRR measurements. Furthermore, EMIRR measurements are performed on several INAs with different specifications to compare and rank them on their EMI immunity levels. Additionally, with the help of EMIRR metric, suitable INAs for developing EMI-sensitive applications are proposed. Finally, the influence of amplifier bandwidth, the input capacitance, 50 Ω termination at the end of RF input trace, INA package parasitics and EMI filter bandwidth on EMIRR is analyzed with the measurement results

Characterization and Modeling of High Power Microwave Effects in CMOS Microelectronics

The intentional use of high power microwave (HPM) signals to disrupt microelectronic systems is a substantial threat to vital infrastructure. Conventional methods to assess HPM threats involve empirical testing of electronic equipment, which provides no insight into fundamental mechanisms of HPM induced upset. The work presented in this dissertation is part of a broad effort to develop more effective means for HPM threat assessment. Comprehensive experimental evaluation of CMOS digital electronics was performed to provide critical information of the elementary mechanisms that govern the dynamics of HPM effects. Results show that electrostatic discharge (ESD) protection devices play a significant role in the behavior of circuits irradiated by HPM pulses. The PN junctions of the ESD protection devices distort HPM waveforms producing DC voltages at the input of the core logic elements, which produces output bit errors and abnormal circuit power dissipation. The dynamic capacitance of these devices combines with linear parasitic elements to create resonant structures that produce nonlinear circuit dynamics such as spurious oscillations. The insight into the fundamental mechanisms this research has revealed will contribute substantially to the broader effort aimed at identifying and mitigating susceptibilities in critical systems. Also presented in this work is a modeling technique based on scalable analytical circuit models that accounts for the non-quasi-static behavior of the ESD protection PN junctions. The results of circuit simulations employing these device models are in excellent agreement with experimental measurements, and are capable of predicting the threshold of effect for HPM driven non-linear circuit dynamics. For the first time, a deterministic method of evaluating HPM effects based on physical, scalable device parameters has been demonstrated. The modeling presented in this dissertation can be easily integrated into design cycles and will greatly aid the development of electronic systems with improved HPM immunity

Fixed-wing MAV attitude stability in atmospheric turbulence, part 1: Suitability of conventional sensors

Fixed-wing Micro-Aerial Vehicles (MAVs) need effective sensors that can rapidly detect turbulence induced motion perturbations. Current MAV attitude control systems rely on inertial sensors. These systems can be described as reactive; detecting the disturbance only after the aircraft has responded to the disturbing phenomena. In this part of the paper, the current state of the art in reactive attitude sensing for fixed-wing MAVs are reviewed. A scheme for classifying the range of existing and emerging sensing techniques is presented. The features and performance of the sensing approaches are discussed in the context of their application to MAV attitude control systems in turbulent environments. It is found that the use of single sensors is insufficient for MAV control in the presence of turbulence and that potential gains can be realised from multi-sensor systems. A successive paper to be published in this journal will investigate novel attitude sensors which have the potential to improve attitude control of MAVs in Turbulenc

Reliability in Power Electronics and Power Systems

L'abstract è presente nell'allegato / the abstract is in the attachmen

Electromagnetic Interference and Compatibility

Recent progress in the fields of Electrical and Electronic Engineering has created new application scenarios and new Electromagnetic Compatibility (EMC) challenges, along with novel tools and methodologies to address them. This volume, which collects the contributions published in the “Electromagnetic Interference and Compatibility” Special Issue of MDPI Electronics, provides a vivid picture of current research trends and new developments in the rapidly evolving, broad area of EMC, including contributions on EMC issues in digital communications, power electronics, and analog integrated circuits and sensors, along with signal and power integrity and electromagnetic interference (EMI) suppression properties of materials

The process of design for environment within global manufacturing companies

Thesis (M.S.)--Massachusetts Institute of Technology, Sloan School of Management, 1996, and Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Civil and Environmental Engineering, 1996.Includes bibliographical references.by Neha Shah, J. Douglas Winter.M.S

Application of the embedded component technology in highly compact inverters

TCC (graduação) - Universidade Federal de Santa Catarina. Campus Blumenau. Engenharia de Controle e AutomaçãoO setor de energia renovável testemunha um crescimento contínuo desde o começo do século, especialmente o ramo fotovoltaico (PV). Paralelamente ao crescimento em capacidade instalada, há também os avanços em pesquisa e desenvolvimento na área. A questão mais preocupante com os módulos PV é sua baixa eficiência, apenas entre 14% e 18%. Logo, deve haver desenvolvimento de novas tecnologias para elevar a eficiência dos sistemas. Um dos componentes chave em instalações fotovoltaicas são os sistemas de eletrônica de potência (conversores CC-CC e CC-CA), portanto, a eficiência de tais equipamentos deve ser a maior possível. Nesse sentido o microinversor HiGaN foi desenvolvido no Fraunhofer ISE. Esse protótipo atingiu alta eficiência com uma alta compacidade e avaliou o uso de transistores GaN nessa aplicação. Entretanto, de modo a ser ainda mais competitivo, o volume e o peso podem ser reduzidos. Uma estratégia compatível para atingir redução de tamanho é o uso da tecnologia de componentes embarcados (TCE), que é uma técnica de fabricação de placas de circuito impresso (PCI) em que os componentes são integrados dentro do substrato. Esse trabalho traz uma revisão e a formação de uma base de dados sobre a TCE e sua aplicação em uma tentativa de reduzir o tamanho da placa mãe do microinversor HiGaN. Uma metodologia de design é desenvolvida e aplicada e cinco novas versões da placa mãe são projetadas, além de cinco diferentes sub módulos. Os projetos são comparados com suas versões originais e uma análise econômica é feita em torno de ofertas enviadas por fabricantes. Simulações térmicas de transistores GaN embarcados foram conduzidas para avaliar outras capacidades da TCE e fornecer um ponto de vista mais amplo sobre a tecnologia. Os resultados indicam que foi possível atingir uma redução em área de no máximo 27.1% em uma das versões da placa mãe. Um dos sub módulos projetados atingiu uma redução em área de 65% confirmando que a TCE permite reduções mais substanciais em placas de baixa potência. Os resultados das simulações térmicas demostraram que a TCE pode ser uma ferramenta útil para melhorar o comportamento térmico de componentes ativos de potência. O trabalho mostra que o desenvolvimento da tecnologia deve ser continuado e devem existir mais aplicações em eletrônica de potência usando substratos orgânicos, de modo a explorar todas as facetas da tecnologia.The renewable energy sector witness continuous growth since the start of the century, specially the photovoltaic (PV) branch. Parallel to the growth in installed capacity there is also advances in research and development in this area. The most significant issue with PV modules is the low efficiency, only between 14% and 18%. Therefore, there must be development of new technologies to increase the systems' efficiency. One of the key components in the PV systems is the power electronic systems (DC-DC and DC-AC converters) therefore the efficiency of such devices must be the highest possible. In this sense the HiGaN microinverter was developed at the Fraunhofer ISE. This prototype achieved very high efficiency with a compact form factor and evaluated the use of GaN transistors in this application. However, in order to be even more competitive the volume and weight can be further reduced. A suitable strategy to achieve size reduction is using the embedded component technology (ECT), which is a printed circuit board (PCB) manufacturing technique where the components are integrated inside the substrate. This work brings an overview and a database formation on the ECT and the application of the technology in an attempt to reduce the HiGaN microinverter motherboard size. A design methodology is developed and applied and five new versions of the motherboard are designed alongside five new submodules. The designs are compared with their original versions and an economic analysis is made around offers provided by manufacturers. Although none of the designs are realized, thermal simulations of embedded GaN transistors are performed to evaluate other capabilities of the ECT and provide a wider look into the technology. The results indicate that it was possible to achieve a maximum size reduction of 27.1% on one of the motherboard designs. One of the microcontroller modules designed achieved 65% of area reduction confirming that the ECT allows for more substantial size reduction when applied in low power boards. The thermal simulations demonstrated that the ECT can be a useful tool to improve thermal behavior of power active components. This work shows that the technology development must be continued and there must be more applications of the ECT in power electronics using organic substrates in order to explore all the facets of the technology

Design and Testing of Electronic Devices for Harsh Environments

In this thesis an overview of the research activity focused on development, design and testing of electronic devices and systems for harsh environments has been reported. The scope of the work has been the design and validation flow of Integrated Circuits operating in two harsh applications: Automotive and High Energy Physics experiments. In order to fulfill the severe operating electrical and environmental conditions of automotive applications, a systematic methodology has been followed in the design of an innovative Intelligent Power Switch: several design solutions have been developed at architectural and circuital level, integrating on-chip selfdiagnostic capabilities and full protection against high voltage and reverse polarity, effects of wiring parasitics, over-current and over-temperature phenomena. Moreover current slope and soft start integrated techniques has ensured low EMI, making the Intelligent Power Switch also configurable to drive different interchangeable loads efficiently. The innovative device proposed has been implemented in a 0.35 μm HV-CMOS technology and embedded in mechatronic 3rd generation brush-holder regulator System-on-Chip for an automotive alternator. Electrical simulations and experimental characterization and testing at componentlevel and on-board system-level has proven that the proposed design allows for a compact and smart power switch realization, facing the harshest automotive conditions. The smart driver has been able to supply up to 1.5 A to various types of loads (e.g.: incadescent lamp bulbs, LED), in operating temperatures in the wide range -40 °C to 150 °C, with robustness against high voltage up to 55 V and reverse polarity up to -15 V. The second branch of research activity has been framed within the High Energy Physics area, leading to the development of a general purpose and flexible protocol for the data acquisition and the distribution of Timing, Trigger and Control signals and its implementation in radiation tolerant interfaces in CMOS 130 nm technology. The several features integrated in the protocol has made it suitable for different High Energy Physics experiments: flexibility w.r.t. bandwidth and latency requirements, robustness of critical information against radiation-induced errors, compatibility with different data types, flexibility w.r.t the architecture of the control and readout systems, are the key features of this novel protocol. Innovative radiation hardening techniques have been studied and implemented in the test-chip to ensure the proper functioning in operating environments with a high level of radiation, such as the Large Hadron Collider at CERN in Geneva. An FPGA-based emulator has been developed and, in a first phase, employed for functional validation of the protocol. In a second step, the emulator has been modified as test-bed to assess the Transmitter and Receiver interfaces embedded on the test-chip. An extensive phase of tests has proven the functioning of the interfaces at the three speed options, 4xF, 8xF and 16xF (F = reference clock frequency) in different configurations. Finally, irradiation tests has been performed at CERN X-rays irradiation facility, bearing out the proper behaviour of the interfaces up to 40 Mrad(SiO2)