Photonic reservoir computing: a new approach to optical information processing

Despite ever increasing computational power, recognition and classification problems remain challenging to solve. Recently advances have been made by the introduction of the new concept of reservoir computing. This is a methodology coming from the field of machine learning and neural networks and has been successfully used in several pattern classification problems, like speech and image recognition. The implementations have so far been in software, limiting their speed and power efficiency. Photonics could be an excellent platform for a hardware implementation of this concept because of its inherent parallelism and unique nonlinear behaviour. We propose using a network of coupled Semiconductor Optical Amplifiers (SOA) and show in simulation that it could be used as a reservoir by comparing it on a benchmark speech recognition task to conventional software implementations. In spite of several differences, they perform as good as or better than conventional implementations. Moreover, a photonic implementation offers the promise of massively parallel information processing with low power and high speed. We will also address the role phase plays on the reservoir performance

Optical interconnection networks based on microring resonators

Optical microring resonators can be integrated on a chip to perform switching operations directly in the optical domain. Thus they become a building block to create switching elements in on-chip optical interconnection networks, which promise to overcome some of the limitations of current electronic networks. However, the peculiar asymmetric power losses of microring resonators impose new constraints on the design and control of on-chip optical networks. In this work, we study the design of multistage interconnection networks optimized for a particular metric that we name the degradation index, which characterizes the asymmetric behavior of microrings. We also propose a routing control algorithm to maximize the overall throughput, considering the maximum allowed degradation index as a constrain

Photonic integration enabling new multiplexing concepts in optical board-to-board and rack-to-rack interconnects

New broadband applications are causing the datacenters to proliferate, raising the bar for higher interconnection speeds. So far, optical board-to-board and rack-to-rack interconnects relied primarily on low-cost commodity optical components assembled in a single package. Although this concept proved successful in the first generations of optical-interconnect modules, scalability is a daunting issue as signaling rates extend beyond 25 Gb/s. In this paper we present our work towards the development of two technology platforms for migration beyond Infiniband enhanced data rate (EDR), introducing new concepts in board-to-board and rack-to-rack interconnects. The first platform is developed in the framework of MIRAGE European project and relies on proven VCSEL technology, exploiting the inherent cost, yield, reliability and power consumption advantages of VCSELs. Wavelength multiplexing, PAM-4 modulation and multi-core fiber (MCF) multiplexing are introduced by combining VCSELs with integrated Si and glass photonics as well as BiCMOS electronics. An in-plane MCF-to-SOI interface is demonstrated, allowing coupling from the MCF cores to 340x400 nm Si waveguides. Development of a low-power VCSEL driver with integrated feed-forward equalizer is reported, allowing PAM-4 modulation of a bandwidth-limited VCSEL beyond 25 Gbaud. The second platform, developed within the frames of the European project PHOXTROT, considers the use of modulation formats of increased complexity in the context of optical interconnects. Powered by the evolution of DSP technology and towards an integration path between inter and intra datacenter traffic, this platform investigates optical interconnection system concepts capable to support 16QAM 40GBd data traffic, exploiting the advancements of silicon and polymer technologies

Photonic-crystal nano-photodetector with ultrasmall capacitance for on-chip light-to-voltage conversion without an amplifier

The power consumption of a conventional photoreceiver is dominated by that of the electric amplifier connected to the photodetector (PD). An ultralow-capacitance PD can overcome this limitation, because it can generate sufficiently large voltage without an amplifier when combined with a high-impedance load. In this work, we demonstrate an ultracompact InGaAs PD based on a photonic crystal waveguide with a length of only 1.7 μm and a capacitance of less than 1 fF. Despite the small size of the device, a high responsivity of 1 A/W and a clear 40 Gbit/s eye diagram are observed, overcoming the conventional trade-off between size and responsivity. A resistor-loaded PD was actually fabricated for light-to-voltage conversion, and a kilo-volt/watt efficiency with a gigahertz bandwidth even without amplifiers was measured with an electro-optic probe. Combined experimental and theoretical results reveal that a bandwidth in excess of 10 GHz can be expected, leading to an ultralow energy consumption of less than 1 fJ/bit for the photoreceiver. Amplifier-less PDs with attractive performance levels are therefore feasible and a step toward a densely integrated photonic network/processor on a chip

Experimental characterization of CMOS photonic devices

Current electrical interconnects in super-computers and high-performance processors present a bottleneck in terms of bandwidth and power consumption. A migration to the optical domain in order to cope with the connectivity between units (e.g. CPUs and memory) is needed to overcome these issues. Zero-change CMOS photonic devices represent a very attractive solution to the design of optical on-chip links. This approach makes use of up-to-date CMOS process, having enormous benefits regarding integration with state-of-the-art electronics. Designing and characterizing zero-change CMOS photonic devices is key for the future of optical interconnects. This thesis presents the characterization both theoretical and experimental of a Silicon-Germanium ring resonator modulator. It represents the first ever depletion modulator up to the date using SiGe as an active material. Moreover, it shows the best wavelength shift reported so far for zero-change CMOS modulators, enhancing the shift of a pure Silicon device. The demonstration of this device begins a new era of optical modulator designs using silicon-germanium to enhance modulation efficiency, and therefore reduce power consumption.Las interconexiones eléctricas de supercomputadores y de microprocesadores de alto rendimiento representan actualmente un bottleneck en cuanto a ancho de banda y potencia consumida se refiere. Se necesita una migración hacia el dominio óptico, para realizar la conectividad entre las diferentes unidades (por ejemplo CPU y memoria), con tal de superar estas limitaciones. Los dispositivos fabricados con la tecnología zero-change CMOS representan una solución muy atractiva para el diseño de links ópticos dentro de un chip. Esta técnica utiliza procesos CMOS actuales, beneficiándose así enormemente de la fácil integración con dispositivos electrónicos actuales. Diseñar y caracterizar dispositivos trabajando con zero-change CMOS es clave para el futuro de las interconexiones ópticas. Esta tesis presenta la caracterización tanto teórica como experimental de un modulador tipo ring resonator de Silicon-Germanium. Es el primer modulador de depletion utilizando SiGe como un material activo. Además, este dispositivo muestra el desplazamiento en longitud de onda más grande publicado hasta la fecha, comparándolo con otros moduladores zero-change CMOS, mejorando el desplazamiento de dispositivos de puro silicio. La demostración de este dispositivo comienza una nueva era de diseños de moduladores ópticos que utilizaran silicon-germanium para mejorar la eficiencia de modulación, y por lo tanto reducir el consumo de potencia.Les interconnexions elèctriques de super-computadors i microprocessadors de alt rendiment representen actualment un coll d'ampolla en quant a ample de banda i potència consumida. Es necessita una migració cap al domini òptic, per realitzar la connectivitat entre les diferents unitats (per exemple entre la CPU i la memòria), per tal de superar aquests problemes. Els dispositius fabricats sota zero-change CMOS technology representen una solució molt atractiva al disseny de links òptics dins d'un xip. Aquesta tècnica utilitza processos CMOS actuals, tenint enormes beneficis en quant a la integració amb dispositius electrònics actuals. Dissenyar i caracteritzar dispositius treballant amb zero-change CMOS és clau pel futur de les interconnexions òptiques del futur. Aquesta tesi presenta la caracterització tant teòrica com experimental d'un modulador ring resonator de Silicon-Germanium. Representa el primer modulador de depletion usant SiGe con un material actiu. A més a més, aquest dispositiu mostra el desplaçament en longitud d'ona més gran publicat fins ara en qualsevol dispositiu zero-change CMOS, millorant el desplaçament de dispositius de pur silici. La demostració d'aquest dispositiu comença una nova era de dissenys de moduladors òptics que utilitzaran silicon-germanium per millorar l'eficiència de modulació i per tant per reduir el consum de potència