Modellistica e progettazione di convertitori elettronici di potenza DC-DC

The present PhD dissertation deals with average modeling, design and experimental verification of power electronic converters. This takes the DC-DC Boost converter as a reference, together with some converter topologies derived from it, such as the interleaved PFC Boost converter. More specifically, in the first part of the dissertation DC-DC converters fundamentals are briefly introduced, i.e. their operating mode, their basic circuit topologies and their parallel and series connections, as well as the basic problems inherent to the design stage of DC-DC converters. Subsequently, this PhD dissertation focuses on the mathematical modeling of the Boost DC-DC converter by means of the averaging technique. In particular, appropriate equivalent switching signals are introduced in order to take into account each converter operating state properly, together with the switch commutation phenomena. In addition, a suitable inductor model is introduced in order to improve inductor losses estimation. As a result, the proposed averaged models are dependent on the switching frequency, still preserving a ripple-free representation of the state variables of the system. The proposed averaged modelling approach enables an enhanced power losses estimation by accounting for switching and current ripple phenomena, over both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). The worth and effectiveness of the proposed modelling approach has been validated through several simulation studies, which are performed in the Matlab-Simulink and SIMetrix/SIMPLIS environments. The last part of this thesis the Boost PFC converters and new silicon carbide power devices, already available in the market, is provided. In particular, with a constant increase of the switching frequencies and the converters power density, new and most efficient solutions are required, for both circuit topologies and power semiconductors. In this context is presented an extensive experimental analysis of a two-phase Interleaved PFC Boost converter. It aims to highlight the most important features of two-phase interleaved PFC converter operation, in terms of both performances and electromagnetic compatibility issues. This has revealed a low level of harmonic pollution and an excellent result in terms of efficiency at rated load, but also potential conducted EMI issues within low and medium frequency ranges. Efficiencies, switching frequencies and operating temperatures, even in these circuit topologies, are strongly dependent on the power electronics devices used. For this reason it has been dealt an experimental study on the silicon carbide semiconductors. Experimental results are finally reported and discussed; they shown that the reduced power dissipation and the low impact of the parasitic elements, that characterize such semiconductor devices, make these components an interesting solution in the realization of compact and highly efficient energy conversion systems

Modellistica e progettazione di convertitori elettronici di potenza DC-DC

The present PhD dissertation deals with average modeling, design and experimental verification of power electronic converters. This takes the DC-DC Boost converter as a reference, together with some converter topologies derived from it, such as the interleaved PFC Boost converter. More specifically, in the first part of the dissertation DC-DC converters fundamentals are briefly introduced, i.e. their operating mode, their basic circuit topologies and their parallel and series connections, as well as the basic problems inherent to the design stage of DC-DC converters. Subsequently, this PhD dissertation focuses on the mathematical modeling of the Boost DC-DC converter by means of the averaging technique. In particular, appropriate equivalent switching signals are introduced in order to take into account each converter operating state properly, together with the switch commutation phenomena. In addition, a suitable inductor model is introduced in order to improve inductor losses estimation. As a result, the proposed averaged models are dependent on the switching frequency, still preserving a ripple-free representation of the state variables of the system. The proposed averaged modelling approach enables an enhanced power losses estimation by accounting for switching and current ripple phenomena, over both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). The worth and effectiveness of the proposed modelling approach has been validated through several simulation studies, which are performed in the Matlab-Simulink and SIMetrix/SIMPLIS environments. The last part of this thesis the Boost PFC converters and new silicon carbide power devices, already available in the market, is provided. In particular, with a constant increase of the switching frequencies and the converters power density, new and most efficient solutions are required, for both circuit topologies and power semiconductors. In this context is presented an extensive experimental analysis of a two-phase Interleaved PFC Boost converter. It aims to highlight the most important features of two-phase interleaved PFC converter operation, in terms of both performances and electromagnetic compatibility issues. This has revealed a low level of harmonic pollution and an excellent result in terms of efficiency at rated load, but also potential conducted EMI issues within low and medium frequency ranges. Efficiencies, switching frequencies and operating temperatures, even in these circuit topologies, are strongly dependent on the power electronics devices used. For this reason it has been dealt an experimental study on the silicon carbide semiconductors. Experimental results are finally reported and discussed; they shown that the reduced power dissipation and the low impact of the parasitic elements, that characterize such semiconductor devices, make these components an interesting solution in the realization of compact and highly efficient energy conversion systems

Inductor losses estimation in DC-DC converters by means of averaging technique

A suitable inductor modeling for power electronic DC-DC converters is presented in this paper. It is developed with the aim of improving inductor losses estimation achievable by averaged models, which inherently neglect inductor current ripple. In order to account for its contribution to the overall inductor losses, an appropriate parallel resistance is thus enclosed into the inductor model, whose value should be chosen in accordance with the DC-DC converter operating conditions. This allows the development of improved averaged models of DC-DC converters, especially in terms of power losses estimation. The effectiveness of the proposed modeling approach has been validated through a simulation study, which refers to the case of a boost DC-DC converter and is performed by means of a suitable circuit simulator designed for rapid modelling of switching power systems (SIMetrix/SIMPLIS)

H-GA-PSO Method for Tuning of a PID Controller for a Buck-Boost Converter Modeled with a New Method of Signal Flow Graph Technique

In this paper, a new method of signal flow graph technique and Mason's gain formula are applied for extracting the model and transfer functions from control to output and from input to output of a buck-boost converter. In order to investigate necessity of a controller for the converter with assumed parameters, the frequency and time domain analysis is done and the open loop system characteristics are verified. In addition, the needed closed loop controlled system specifications are determined. Moreover, designing a controller for the mentioned converter system based on the extracted model is discussed. For this purpose, a proportional-integral-derivative (PID) controller is designed and the hybrid of genetic algorithm (GA) and particle swarm optimization (PSO), called H-GA-PSO method is used for tuning of the PID controller. Finally, the simulation results are used to show the performance of the proposed modeling and regulation methods

H-GA-PSO Method for Tuning of a PID Controller for a Buck-Boost Converter Modeled with a New Method of Signal Flow Graph Technique

In this paper, a new method of signal flow graph technique and Mason’s gain formula are applied for extracting the model and transfer functions from control to output and from input to output of a buck-boost converter. In order to investigate necessity of a controller for the converter with assumed parameters, the frequency and time domain analysis is done and the open loop system characteristics are verified. In addition, the needed closed loop controlled system specifications are determined. Moreover, designing a controller for the mentioned converter system based on the extracted model is discussed. For this purpose, a proportional-integral-derivative (PID) controller is designed and the hybrid of genetic algorithm (GA) and particle swarm optimization (PSO), called H-GA-PSO method is used for tuning of the PID controller. Finally, the simulation results are used to show the performance of the proposed modeling and regulation methods

Multi-harmonic Modeling of Low-power PWM DC-DC Converter

Modeling and simulation of switched-mode Pulse Width Modulated (PWM) DC-DC converters form an essential ingredient in the analysis and design process of integrated circuits. In this research work, we present a novel large-signal modeling technique for low-power PWM DC-DC converters. The proposed model captures not only the time-averaged response within each moving switching cycle but also high-order harmonics of an arbitrary degree, hence modeling both the average component and ripple very accurately. The proposed model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. By continuously monitoring state variables, our model seamlessly transitions between the continuous conduction mode (CCM) and discontinuous conduction mode (DCM), which often occurs in low-power applications. The nonlinearities of devices are also considered and efficiently evaluated resulting in a significant improvement in model accuracy. With a system decoupling technique, the DC response of the model is decoupled from higher-order harmonics, providing additional simulation speedups. For a number of converter designs, the proposed model obtains up to 10x runtime speedups over transistor-level transient simulation with a maximum output voltage error less than 4%

Polynomial Curve Slope Compensation for Peak-Current-Mode-Controlled Power Converters

Linear ramp slope compensation (LRC) and quadratic slope compensation (QSC) are commonly implemented in peak-current-mode-controlled dc-dc converters in order to minimize subharmonic and chaotic oscillations. Both compensating schemes rely on the linearized state-space averaged model (LSSA) of the converter. The LSSA ignores the impact that switching actions have on the stability of converters. In order to include switching events, the nonlinear analysis method based on the Monodromy matrix was introduced to describe a complete-cycle stability. Analyses on analog-controlled dc-dc converters applying this method show that system stability is strongly dependent on the change of the derivative of the slope at the time of switching instant. However, in a mixed-signal-controlled system, the digitalization effect contributes differently to system stability. This paper shows a full complete-cycle stability analysis using this nonlinear analysis method, which is applied to a mixed-signal-controlled converter. Through this analysis, a generalized equation is derived that reveals for the first time the real boundary stability limits for LRC and QSC. Furthermore, this generalized equation allows the design of a new compensating scheme, which is able to increase system stability. The proposed scheme is called polynomial curve slope compensation (PCSC) and it is demonstrated that PCSC increases the stable margin by 30% compared to LRC and 20% to QSC. This outcome is proved experimentally by using an interleaved dc-dc converter that is built for this work

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

An enhanced model for small-signal analysis of the phase-shifted full-bridge converter

This paper presents an in-depth critical discussion and derivation of a detailed small-signal analysis of the Phase-Shifted Full-Bridge (PSFB) converter. Circuit parasitics, resonant inductance and transformer turns ratio have all been taken into account in the evaluation of this topology’s open-loop control-to-output, line-to-output and load-to-output transfer functions. Accordingly, the significant impact of losses and resonant inductance on the converter’s transfer functions is highlighted. The enhanced dynamic model proposed in this paper enables the correct design of the converter compensator, including the effect of parasitics on the dynamic behavior of the PSFB converter. Detailed experimental results for a real-life 36V-to-14V/10A PSFB industrial application show excellent agreement with the predictions from the model proposed herein.