Despachador de tareas de tiempo real por eventos temporizados

El desarrollo de despachadores presenta una serie de inconvenientes a la hora de implementarlos (conmutación de tareas, manejo de pila, etc), sin embargo el cálculo del segmento de tiempo asignado a la ejecución de una tarea (ranura) es muy importante cuando se desea lograr una buena performance. En [1], [2], [6] y [8] se demostró que el rendimiento de Sistemas de Tiempo Real (STR) funcionando en un esquema de Prioridades Fijas (PF) ordenados por períodos monotónicos crecientes (PMC), es muy sensible al tiempo de duración de la ranura elegida. El presente trabajo describe un despachador PMC, cuyas ranuras, disparadas por un timer, no son fijas, sino que se adecuan a la próxima tarea a ser despachada, logrando un rendimiento óptimo. Dicho esquema básicamente reduce el “overhead” y evita todo tipo de bloqueo inherente en los sistemas de ranuras fijas, pues se comporta prácticamente como un esquema de despacho de tareas manejado por eventos.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de ProcesadoresRed de Universidades con Carreras en Informática (RedUNCI

Despachador de tareas de tiempo real por eventos temporizados

El desarrollo de despachadores presenta una serie de inconvenientes a la hora de implementarlos (conmutación de tareas, manejo de pila, etc), sin embargo el cálculo del segmento de tiempo asignado a la ejecución de una tarea (ranura) es muy importante cuando se desea lograr una buena performance. En [1], [2], [6] y [8] se demostró que el rendimiento de Sistemas de Tiempo Real (STR) funcionando en un esquema de Prioridades Fijas (PF) ordenados por períodos monotónicos crecientes (PMC), es muy sensible al tiempo de duración de la ranura elegida. El presente trabajo describe un despachador PMC, cuyas ranuras, disparadas por un timer, no son fijas, sino que se adecuan a la próxima tarea a ser despachada, logrando un rendimiento óptimo. Dicho esquema básicamente reduce el “overhead” y evita todo tipo de bloqueo inherente en los sistemas de ranuras fijas, pues se comporta prácticamente como un esquema de despacho de tareas manejado por eventos.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de ProcesadoresRed de Universidades con Carreras en Informática (RedUNCI

RT-Bench, Improved Understanding of Application Performance with Memory Storage

By implementing efficient and smart schedulers in our software systems with multiple threads we can make applications run faster and much more efficiently. There is however a lot of caution when adopting and implementing scheduling algorithms, like limited preemptive scheduling or PD2, due to the uncertainty they may cause on advanced and complex systems. In fact, most algorithms are tested to produce advantages in specific situations. This is one of the reasons why there is a gap between the theoretical scheduling development and the actual schedulers implemented in real operating systems. One way to close the gap is to derive precise guarantees for the implementation of scheduling algorithms, which is the purpose of rt-bench. Rt-bench calculates characteristic values for a specified scheduling algorithm and a specific task set, mainly in form of supply bound functions based on the execution of the task set on a Linux-based hardware platform. The characteristics can vary depending on the system and the setup, therefore these are used to compare complete execution platforms rather than single algorithms. This thesis focuses on extending rt-bench to increase the realistic behaviour of the simulation of the application behaviour. Before this thesis, rt-bench could simulate computations but not memory handling. Simulating memory management is necessary to create realistic models and the purpose of this thesis is to introduce this memory usage in rt-bench. The results show a clear performance drop before the model reaches a memory level equal to the cache size, due to other processes also using the cache memory. This behaviour is what was expected and confirms that the implementation is sufficient for measuring and evaluating performance offered by different platforms

Least space-time first scheduling algorithm : scheduling complex tasks with hard deadline on parallel machines

Both time constraints and logical correctness are essential to real-time systems and failure to specify and observe a time constraint may result in disaster. Two orthogonal issues arise in the design and analysis of real-time systems: one is the specification of the system, and the semantic model describing the properties of real-time programs; the other is the scheduling and allocation of resources that may be shared by real-time program modules. The problem of scheduling tasks with precedence and timing constraints onto a set of processors in a way that minimizes maximum tardiness is here considered. A new scheduling heuristic, Least Space Time First (LSTF), is proposed for this NP-Complete problem. Basic properties of LSTF are explored; for example, it is shown that (1) LSTF dominates Earliest-Deadline-First (EDF) for scheduling a set of tasks on a single processor (i.e., if a set of tasks are schedulable under EDF, they are also schedulable under LSTF); and (2) LSTF is more effective than EDF for scheduling a set of independent simple tasks on multiple processors. Within an idealized framework, theoretical bounds on maximum tardiness for scheduling algorithms in general, and tighter bounds for LSTF in particular, are proven for worst case behavior. Furthermore, simulation benchmarks are developed, comparing the performance of LSTF with other scheduling disciplines for average case behavior. Several techniques are introduced to integrate overhead (for example, scheduler and context switch) and more realistic assumptions (such as inter-processor communication cost) in various execution models. A workload generator and symbolic simulator have been implemented for comparing the performance of LSTF (and a variant -- LSTF+) with that of several standard scheduling algorithms. LSTF\u27s execution model, basic theories, and overhead considerations have been defined and developed. Based upon the evidence, it is proposed that LSTF is a good and practical scheduling algorithm for building predictable, analyzable, and reliable complex real-time systems. There remain some open issues to be explored, such as relaxing some current restrictions, discovering more properties and theorems of LSTF under different models, etc. We strongly believe that LSTF can be a practical scheduling algorithm in the near future

Response-time analysis for fixed-priority systems with a write-back cache

This paper introduces analyses of write-back caches integrated into response-time analysis for fixed-priority preemptive and non-preemptive scheduling. For each scheduling paradigm, we derive four different approaches to computing the additional costs incurred due to write backs. We show the dominance relationships between these different approaches and note how they can be combined to form a single state-of-the-art approach in each case. The evaluation explores the relative performance of the different methods using a set of benchmarks, as well as making comparisons with no cache and a write-through cache. We also explore the effect of write buffers used to hide the latency of write-through caches. We show that depending upon the depth of the buffer used and the policies employed, such buffers can result in domino effects. Our evaluation shows that even ignoring domino effects, a substantial write buffer is needed to match the guaranteed performance of write-back caches

Multi-signal Anomaly Detection for Real-Time Embedded Systems

This thesis presents MuSADET, an anomaly detection framework targeting timing anomalies found in event traces from real-time embedded systems. The method leverages stationary event generators, signal processing, and distance metrics to classify inter-arrival time sequences as normal/anomalous. Experimental evaluation of traces collected from two real-time embedded systems provides empirical evidence of MuSADET’s anomaly detection performance. MuSADET is appropriate for embedded systems, where many event generators are intrinsically recurrent and generate stationary sequences of timestamp. To find timinganomalies, MuSADET compares the frequency domain features of an unknown trace to a normal model trained from well-behaved executions of the system. Each signal in the analysis trace receives a normal/anomalous score, which can help engineers isolate the source of the anomaly. Empirical evidence of anomaly detection performed on traces collected from an industrygrade hexacopter and the Controller Area Network (CAN) bus deployed in a real vehicle demonstrates the feasibility of the proposed method. In all case studies, anomaly detection did not require an anomaly model while achieving high detection rates. For some of the studied scenarios, the true positive detection rate goes above 99 %, with false-positive rates below one %. The visualization of classification scores shows that some timing anomalies can propagate to multiple signals within the system. Comparison to the similar method, Signal Processing for Trace Analysis (SiPTA), indicates that MuSADET is superior in detection performance and provides complementary information that can help link anomalies to the process where they occurred

A Review of Priority Assignment in Real-Time Systems

It is over 40 years since the first seminal work on priority assignment for real-time systems using fixed priority scheduling. Since then, huge progress has been made in the field of real-time scheduling with more complex models and schedulability analysis techniques developed to better represent and analyse real systems. This tutorial style review provides an in-depth assessment of priority assignment techniques for hard real-time systems scheduled using fixed priorities. It examines the role and importance of priority in fixed priority scheduling in all of its guises, including: preemptive and non-pre-emptive scheduling; covering single- and multi-processor systems, and networks. A categorisation of optimal priority assignment techniques is given, along with the conditions on their applicability. We examine the extension of these techniques via sensitivity analysis to form robust priority assignment policies that can be used even when there is only partial information available about the system. The review covers priority assignment in a wide variety of settings including: mixed-criticality systems, systems with deferred pre-emption, and probabilistic real-time systems with worstcase execution times described by random variables. It concludes with a discussion of open problems in the area of priority assignment

Fair and efficient CPU scheduling algorithms.

No abstract available.The original print copy of this thesis may be available here: http://wizard.unbc.ca/record=b131703