Digital twin development of a dynamic hardware emulator

The increasing deployment of new technologies to contribute to the decarbonization of power systems is imposing new challenges in terms of system dynamics and stability. To deal with different operating and control issues in this sense, and support actual needs, advanced tools and solutions are required. Therefore, this paper presents a digital twin of a dynamic hardware emulator that can be used for controller hardware in the loop (CHIL) testing and is based on a small-scale laboratory system. To build the simulation model, the parameters of involved synchronous machines, excitation systems, prime movers and transmission lines have been identified and then compared to laboratory measurements to assess the accuracy of the digital twin. Static and dynamic accuracy have been investigated and an overall good accuracy can be shown with the help of quantification of errors. Furthermore, a case study is presented where the digital twin was used to design a controller to damp inter-area oscillations with the help of wide area measurements. This controller was then implemented and tested within the dynamic hardware emulator in the laboratory

The Viking surface sampler

A surface sampler subsystem for the Viking Lander has been designed, fabricated, cleaned, and successfully tested. Testing has included component level tests to qualification environment and subsystem level tests. This development hardware has also been integrated into a System Test Bed (STB) for the lander system. In addition to the normal dynamic and thermal environments the surface sampler hardware has been tested in an aircraft to simulate the effects of the reduced Martian gravity. Although problems have been encountered with the first-build and integration, the basic design appears to be sound and hardware qualification is scheduled for late 1973

Development of drive mechanism for an oscillating airfoil

The design and development of an in-draft wind tunnel test section which will be used to study the dynamic stall of airfoils oscillating in pitch is described. The hardware developed comprises a spanned airfoil between schleiren windows, a four bar linkage, flywheels, a drive system and a test section structure

A Comprehensive Workflow for General-Purpose Neural Modeling with Highly Configurable Neuromorphic Hardware Systems

In this paper we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic synapses that is currently under development, and we sketch the conceptual challenges that arise from taking this platform into operation. More specifically, we aim at the establishment of this neuromorphic system as a flexible and neuroscientifically valuable modeling tool that can be used by non-hardware-experts. We consider various functional aspects to be crucial for this purpose, and we introduce a consistent workflow with detailed descriptions of all involved modules that implement the suggested steps: The integration of the hardware interface into the simulator-independent model description language PyNN; a fully automated translation between the PyNN domain and appropriate hardware configurations; an executable specification of the future neuromorphic system that can be seamlessly integrated into this biology-to-hardware mapping process as a test bench for all software layers and possible hardware design modifications; an evaluation scheme that deploys models from a dedicated benchmark library, compares the results generated by virtual or prototype hardware devices with reference software simulations and analyzes the differences. The integration of these components into one hardware-software workflow provides an ecosystem for ongoing preparative studies that support the hardware design process and represents the basis for the maturity of the model-to-hardware mapping software. The functionality and flexibility of the latter is proven with a variety of experimental results

Innovations in dynamic test restraint systems

Recent launch system development programs have led to a new generation of large scale dynamic tests. The variety of test scenarios share one common requirement: restrain and capture massive high velocity flight hardware with no structural damage. The Space Systems Lab of McDonnell Douglas developed a remarkably simple and cost effective approach to such testing using ripstitch energy absorbers adapted from the sport of technical rockclimbing. The proven system reliability of the capture system concept has led to a wide variety of applications in test system design and in aerospace hardware design

Inclined Surface Locomotion Strategies for Spherical Tensegrity Robots

This paper presents a new teleoperated spherical tensegrity robot capable of performing locomotion on steep inclined surfaces. With a novel control scheme centered around the simultaneous actuation of multiple cables, the robot demonstrates robust climbing on inclined surfaces in hardware experiments and speeds significantly faster than previous spherical tensegrity models. This robot is an improvement over other iterations in the TT-series and the first tensegrity to achieve reliable locomotion on inclined surfaces of up to 24\degree. We analyze locomotion in simulation and hardware under single and multi-cable actuation, and introduce two novel multi-cable actuation policies, suited for steep incline climbing and speed, respectively. We propose compelling justifications for the increased dynamic ability of the robot and motivate development of optimization algorithms able to take advantage of the robot's increased control authority.Comment: 6 pages, 11 figures, IROS 201

Structural characterization of a first-generation articulated-truss joint for space crane application

A first-generation space crane articulated-truss joint was statically and dynamically characterized in a configuration that approximated an operational environment. The articulated-truss joint was integrated into a test-bed for structural characterization. Static characterization was performed by applying known loads and measuring the corresponding deflections to obtain load-deflection curves. Dynamic characterization was performed using modal testing to experimentally determine the first six mode shapes, frequencies, and modal damping values. Static and dynamic characteristics were also determined for a reference truss that served as a characterization baseline. Load-deflection curves and experimental frequency response functions are presented for the reference truss and the articulated-truss joint mounted in the test-bed. The static and dynamic experimental results are compared with analytical predictions obtained from finite element analyses. Load-deflection response is also presented for one of the linear actuators used in the articulated-truss joint. Finally, an assessment is presented for the predictability of the truss hardware used in the reference truss and articulated-truss joint based upon hardware stiffness properties that were previously obtained during the Precision Segmented Reflector (PSR) Technology Development Program

Constructing cluster of simple FPGA boards for cryptologic computations

In this paper, we propose an FPGA cluster infrastructure, which can be utilized in implementing cryptanalytic attacks and accelerating cryptographic operations. The cluster can be formed using simple and inexpensive, off-the-shelf FPGA boards featuring an FPGA device, local storage, CPLD, and network connection. Forming the cluster is simple and no effort for the hardware development is needed except for the hardware design for the actual computation. Using a softcore processor on FPGA, we are able to configure FPGA devices dynamically and change their configuration on the fly from a remote computer. The softcore on FPGA can execute relatively complicated programs for mundane tasks unworthy of FPGA resources. Finally, we propose and implement a fast and efficient dynamic configuration switch technique that is shown to be useful especially in cryptanalytic applications. Our infrastructure provides a cost-effective alternative for formerly proposed cryptanalytic engines based on FPGA devices

Shape Display Shader Language (SDSL): a new programming model for shape changing displays

Shape-changing displays' dynamic physical affordances have inspired a range of novel hardware designs to support new types of interaction. Despite rapid technological progress, the community lacks a common programming model for developing applications for these visually and physically-dynamic display surfaces. This results in complex, hardware-specific, custom-code that requires significant development effort and prevents researchers from easily building on and sharing their applications across hardware platforms. As a first attempt to address these issues we introduce SDSL, a Shape-Display Shader Language for easily programming shape-changing displays in a hardware-independent manner. We introduce the (graphics-derived) pipeline model of SDSL, an open-source implementation that includes a compiler, runtime, IDE, debugger, and simulator, and show demonstrator applications running on two shape-changing hardware setups