Conception et réalisation de la partie numérique d'un simulateur matériel pour les canaux de propagation MIMO

The need to improve the capacity of wireless networks, for the data transmission and multimedia applications of the digital communication systems, has to focus on MIMO communication techniques to increase the data rate and the quality of services. MIMO systems use antenna arrays at both the transmit and the receive sides of a radio link and exploit the spatial dimension for the transmission. The performance of a communication system can be evaluated using a hardware simulator of radio propagation channels. This Ph.D. deals with the design and the implementation of the digital block of a hardware simulator of MIMO propagation channels, for both UMTS and WLAN networks. The hardware simulation of radio channel provides the necessary processing speed. Other advantages of the hardware simulation are the real time performance evaluation and the comparison of different systems in a time varying radio propagation channel under the same test conditions. Two approaches have been considered, one for indoor environments, the other for outdoor environments. The proposed digital architectures were studied and implemented within FPGA. Performance and complexity evaluation shows the interest of these architectures. This work was carried out under the project SIMPAA 2, with the support of the "Région Bretagne".Le besoin d'améliorer la capacité des réseaux sans-fil, pour la transmission de données et les applications multimédia des systèmes de communications numériques, a amené à s'intéresser aux techniques de communication MIMO (Multiple Input Multiple Output) pour augmenter le débit et la qualité des transmissions. Les systèmes MIMO se servent de réseaux d'antennes, à la fois à l'émission et à la réception d'une communication radio et ainsi exploitent la dimension spatiale pour la transmission de l'information. Les performances expérimentales d'un système de communication peuvent être évaluées en utilisant un simulateur matériel du canal de propagation. Cette thèse a pour objectif la conception et la réalisation de la partie numérique d'un simulateur matériel pour les canaux de propagation MIMO, pour les réseaux UMTS et WLAN. La simulation matérielle du canal radio assure la vitesse de traitement nécessaire. D'autres avantages de la simulation matérielle sont l'évaluation des performances en temps réel et la comparaison de divers systèmes de radiocommunication dans un canal de propagation variant dans le temps, dans les mêmes conditions de test. L'étude de faisabilité a permis d'établir deux approches, l'une pour les environnements indoor, l'autre pour les environnements outdoor. Les architectures numériques proposées ont été étudiées et implémentées dans un composant programmable FPGA. L'évaluation des performances et de la complexité montre l'intérêt de ces architectures. Ce travail a été réalisé dans le cadre du projet PRIR SIMPAA 2, avec le soutien de la Région Bretagne

Hardware Simulator Design for MIMO Propagation Channel on Shipboard at 2.2 GHz

27 pagesInternational audienceA wireless communication system can be tested either in actual conditions or with a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired radio channel, making it possible to test "on table" mobile radio equipments. This paper presents new architectures for the digital block of a hardware simulator ofMIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architectures of the digital block of the simulator for shipboard environment are presented. A hardware simulator must reproduce the behavior of the radio propagation channel. Thus, ameasurements campaign has been conducted to obtain the impulse responses of the shipboard channel using a channel sounder designed and realized at IETR. After the presentation of the channel sounder, the channel impulse responses are described and implemented. Then, the new architectures of the digital block of the hardware simulator, implemented on a Xilinx Virtex-IV FPGA are presented. The accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

MIMO Hardware Simulator Design For UMTS And WLAN Applications

International audienceThe aim of the PRIR SIMPAA2 project, which continues the research activities of the RNRT SIMPAA project, is the realization of a hardware simulator of MIMO propagation channels for UMTS (Universal Mobile Telecommunications System) and WLAN (Wireless Local Area Networks) applications. The simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments

MIMO Hardware Simulator Using Standard Channel Models and Measurement Data at 2.2 and 3.5 GHz

20 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents architectures for the digital block of a hardware simulator of MIMO (multiple-input multiple-output) propagation channels. This simulator can be used for LTE (long term evolution system) and WLAN (wireless local area networks) 802.11ac applications, in indoor and outdoor environments. The first architecture is appropriate for shipboard environments, while the second corresponds to outdoor-to-indoor environments and considers the wave propagation penetration within buildings. Measurements campaigns carried out at 2.2 and 3.5 GHz have been conducted to obtain the impulse responses of the channel using a MIMO channel sounder designed at IETR. The measurements are processed with an algorithm extracting the dominant paths. The architectures of the digital block are implemented on a Xilinx Virtex-IV FPGA (field programmable gate array). After the implementation of the impulse responses, the accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

Improved Frequency Domain Architecture for the Digital Block of a Hardware Simulator for MIMO Radio Channels

International audienceThis paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for UMTS and WLAN applications in indoor and outdoor environments. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA, and its accuracy is analyzed

MIMO hardware simulator design for heterogeneous indoor environments using TGn channel models

10 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents new frequency domain and time domain architectures for the digital block of a hardware simulator of Multiple-Input Multiple-Output (MIMO) propagation channels. This simulator can be used for Wireless Local Area Networks (WLAN) 802.11ac applications. It characterizes an indoor scenario using TGn channel models. After the description of the general characteristics of the hardware simulator, the new architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latency are analyzed

Hardware Simulator: Digital Block Design for Time- Varying MIMO Channels with TGn Model B Test

International audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. Thus, it makes possible to ensure the same test conditions in order to compare the performance of various equipments. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with WLAN 802.11ac standard, in indoor environment, using time-varying TGn 802.11n channel model B. After the description of the general characteristics of the hardware simulator, the new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed

Hardware simulator design for LTE applications with time-varying MIMO channels

International audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with LTE standard, in outdoor environment, using time-varying channels. The new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed. The result shows that the architectures produce low occupation on the FPGA and have a small relative error of the output signals

MIMO Hardware Simulator: New Digital Block Design in Frequency Domain for Streaming Signals

11 pagesInternational audienceThis paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. It accepts signals in streaming mode. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA. It is tested with time-varying 3GPP TR 36.803 channel model EVA and TGn channel model E. Finally, its accuracy is analyzed