Analytical expressions for the distortion of asynchronous sigma-delta modulators

This brief investigates the commonly used asynchronous sigma-delta modulator, which consists of a Schmitt trigger and a continuous-time loop filter. A detailed analysis is presented to accurately predict the distortion of such modulators. The extracted expressions are compared with simulation results, and they illustrate an excellent match. The results are also compared with a previous work by Roza, and they show a drastic improvement in accuracy

All-Optical Sigma-Delta Modulator for Analog-to-Digital Conversion

In this thesis, an all-optical sigma-delta (ΣΔ) modulator for analog-to-digital conversion (ADC) using a novel optical bistable switch, the SOA-PD device, is demonstrated. The presented all-optical ΣΔ modulator consists of a photonic leaky integrator, the SOA-PD optical comparator, and a positive feedback loop. The switching properties of the SOA-PD device are studied and experimentally tested to confirm its performance. Then the all-optical ΣΔ modulator is designed according to the switching performance of the SOA-PD device. It is demonstrated that the all-optical ΣΔ modulator is capable of producing an inverted non-return-to-zero (NRZ) type binary output for frequencies in the range of dozens of kilohertz. The limit cycle frequency of the ADC system is about 250 kHz, which is limited by the maximum switching speed of the SOA-PD device. Through noise analysis of the system, SNR and ENOB of the system are calculated to be 25.3 dB and 3.93 bits respectively

Low Power Analog to Digital Converters in Advanced CMOS Technology Nodes

The dissertation presents system and circuit solutions to improve the power efficiency and address high-speed design issues of ADCs in advanced CMOS technologies. For image sensor applications, a high-performance digitizer prototype based on column-parallel single-slope ADC (SS-ADC) topology for readout of a back-illuminated 3D-stacked CMOS image sensor is presented. To address the high power consumption issue in high-speed digital counters, a passing window (PW) based hybrid counter topology is proposed. To address the high column FPN under bright illumination conditions, a double auto-zeroing (AZ) scheme is proposed. The proposed techniques are experimentally verified in a prototype chip designed and fabricated in the TSMC 40 nm low-power CMOS process. The PW technique saves 52.8% of power consumption in the hybrid digital counters. Dark/bright column fixed pattern noise (FPN) of 0.0024%/0.028% is achieved employing the proposed double AZ technique for digital correlated double sampling (CDS). A single-column digitizer consumes total power of 66.8μW and occupies an area of 5.4 µm x 610 µm. For mobile/wireless receiver applications, this dissertation presents a low-power wide-bandwidth multistage noise-shaping (MASH) continuous-time delta-sigma modulator (CT-ΔΣM) employing finite impulse response (FIR) digital-to-analog converters (DACs) and encoder-embedded loop-unrolling (EELU) quantizers. The proposed MASH 1-1-1 topology is a cascade of three single-loop first-order CT-ΔΣM stages, each of which consists of an active-RC integrator, a current-steering DAC, and an EELU quantizer. An FIR filter in the main 1.5-bit DAC improves the modulator’s jitter sensitivity performance. FIR’s effect on the noise transfer function (NTF) of the modulator is compensated in the digital domain thanks to the MASH topology. Instead of employing a conventional analog direct feedback path, a 1.5-bit EELU quantizer based on multiplexing comparator outputs is proposed; this approach is suitable for highspeed operation together with power and area benefits. Fabricated in a 40-nm low-power CMOS technology, the modulator’s prototype achieves a 67.3 dB of signal-to-noise and distortion ratio (SNDR), 68 dB of signal-to-noise ratio (SNR), and 68.2 dB of dynamic range (DR) within 50.5 MHz of bandwidth (BW), while consuming 19 mW of total power (P). The proposed modulator features 161.5 dB of figure-of-merit (FOM), defined as FOM = SNDR + 10 log10 (BW/P)

Asynchronous Signal Processing for Compressive Data Transmission

In this thesis we propose a power-efficient procedure useful in the acquisition of biological data in digital form without using high frequency samplers. The data is compressed so that transmission is limited to parts of the signal that are significant. Our procedure uses an asynchronous sigma delta modulator (ASDM) together with a time-to-digital converter (TDC) to obtain binary data that is transmitted via orthogonal frequency division multiplexing (OFDM). The asynchronous sigma delta modulator is a nonlinear feedback system that allows the representation of bounded signals by zero-crossing times of a binary signal. Using duty-cycle modulation, the ASDM is shown to be equivalent to an optimal level-crossing sampler. The zero-crossing times are measured with a time-to-digital converter that applies pulse-shrinking delay lines and requires no high-frequency clock. Reconstruction of the original signal is possible from the zero-crossing times of the ASDM output binary signal. ASDM time-domain compression is compared with discrete wavelet transform based data compression. For wireless data transmission, the orthogonal frequency division multiplexing (OFDM) reduces the bit error-rate in multipath fading channels. The performance of the proposed algorithm is illustrated using an electrocardiogram signal, which fits the bursty characteristic appropriate for our procedure

Optical Bistability in a VCSEL Coupled to Serially-Connected PIN Photodiodes Quantizer Device

In this work we investigated the structure and performance of vertical cavity surface emitting lasers (VCSEL) which will be used in building an optical quantizer. In any p-i-n structure, capacitance is the most important factor in deciding the highest modulation speed. Therefore, components with smaller capacitance would show higher switching speed. A novel electrical quantizer was constructed using two identical 850 nm Finisar VCSELs, which could manifest electrical switching up to 1.4 MHz. Also, a new electrical quantizer was built with two Eudyna PIN photodiodes (PD-PD), which works at higher frequencies up to 8 MHz, comparing to previous works. The switching photocurrent produced by the PD-PD device was used to modulate a VCSEL. The output of the VCSEL showed the signal with bistable characteristics, however, the amplitude of the optical signal was not large, which was due to the small amplitude of the modulating photocurrent produced by the photodiodes