A review of advances in pixel detectors for experiments with high rate and radiation

The Large Hadron Collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog. Phy

Voyager electronic parts radiation program, volume 1

The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized

Radiation Risks and Mitigation in Electronic Systems

Electrical and electronic systems can be disturbed by radiation-induced effects. In some cases, radiation-induced effects are of a low probability and can be ignored; however, radiation effects must be considered when designing systems that have a high mean time to failure requirement, an impact on protection, and/or higher exposure to radiation. High-energy physics power systems suffer from a combination of these effects: a high mean time to failure is required, failure can impact on protection, and the proximity of systems to accelerators increases the likelihood of radiation-induced events. This paper presents the principal radiation-induced effects, and radiation environments typical to high-energy physics. It outlines a procedure for designing and validating radiation-tolerant systems using commercial off-the-shelf components. The paper ends with a worked example of radiation-tolerant power converter controls that are being developed for the Large Hadron Collider and High Luminosity-Large Hadron Collider at CERN.Comment: 19 pages, contribution to the 2014 CAS - CERN Accelerator School: Power Converters, Baden, Switzerland, 7-14 May 201

Radiation damages in CMOS image sensors: testing and hardening challenges brought by deep sub-micrometer CIS processes

This paper presents a summary of the main results we observed after several years of study on irradiated custom imagers manufactured using 0,18 µm CMOS processes dedicated to imaging. These results are compared to irradiated commercial sensor test results provided by the Jet Propulsion Laboratory to enlighten the differences between standard and pinned photodiode behaviors. Several types of energetic particles have been used (gamma rays, X-rays, protons and neutrons) to irradiate the studied devices. Both total ionizing dose (TID) and displacement damage effects are reported. The most sensitive parameter is still the dark current but some quantum eficiency and MOSFET characteristics changes were also observed at higher dose than those of interest for space applications. In all these degradations, the trench isolations play an important role. The consequences on radiation testing for space applications and radiation-hardening-by-design techniques are also discussed

Ionizing radiation effects on CMOS imagers manufactured in deep submicron process

We present here a study on both CMOS sensors and elementary structures (photodiodes and in-pixel MOSFETs) manufactured in a deep submicron process dedicated to imaging. We designed a test chip made of one 128×128-3T-pixel array with 10 µm pitch and more than 120 isolated test structures including photodiodes and MOSFETs with various implants and different sizes. All these devices were exposed to ionizing radiation up to 100 krad and their responses were correlated to identify the CMOS sensor weaknesses. Characterizations in darkness and under illumination demonstrated that dark current increase is the major sensor degradation. Shallow trench isolation was identified to be responsible for this degradation as it increases the number of generation centers in photodiode depletion regions. Consequences on hardness assurance and hardening-by-design are discussed

Total Dose Simulation for High Reliability Electronics

abstract: New technologies enable the exploration of space, high-fidelity defense systems, lighting fast intercontinental communication systems as well as medical technologies that extend and improve patient lives. The basis for these technologies is high reliability electronics devised to meet stringent design goals and to operate consistently for many years deployed in the field. An on-going concern for engineers is the consequences of ionizing radiation exposure, specifically total dose effects. For many of the different applications, there is a likelihood of exposure to radiation, which can result in device degradation and potentially failure. While the total dose effects and the resulting degradation are a well-studied field and methodologies to help mitigate degradation have been developed, there is still a need for simulation techniques to help designers understand total dose effects within their design. To that end, the work presented here details simulation techniques to analyze as well as predict the total dose response of a circuit. In this dissertation the total dose effects are broken into two sub-categories, intra-device and inter-device effects in CMOS technology. Intra-device effects degrade the performance of both n-channel and p-channel transistors, while inter-device effects result in loss of device isolation. In this work, multiple case studies are presented for which total dose degradation is of concern. Through the simulation techniques, the individual device and circuit responses are modeled post-irradiation. The use of these simulation techniques by circuit designers allow predictive simulation of total dose effects, allowing focused design changes to be implemented to increase radiation tolerance of high reliability electronics.Dissertation/ThesisPh.D. Electrical Engineering 201

Radiation Effects in Integrated Circuits, and Radiation Hardening Techniques

Radiation from natural and artificial elements bombards the earth The radiation environment depends on energy distribution and particle spectra. Radiation affects most electronic components, especially ICs (ICs). High nuclear reactors and space radiation damage electronic components, but the earth's electronic components also do. Semiconductors are radiation-sensitive, hence ICs need radiation shielding. The operation and performance of devices are affected by these effects. Radiation type, energy, flux, and exposure period affect damage. Gamma rays and neutrons are indirect ionizing radiation. These beams harm silicon-based semiconductors like transistors. Radiation can damage semiconductors, especially ICs. As a result of displacement damage and ionizing radiation, semiconductors degrade in three devices. Insulator traps charge. (2) minor carrier recombination modifications Various-energy particles generate different ionization and displacement damage. In the research of radiation effects and consequences, it's vital to look at how radiation affects semiconductors and integrated circuits. Radiation hardening decreases radiation damage. Radiation hardening renders electronics ionizing or non-ionizing radiation-resistant. To assure appropriate operation, IC, sensor, and military aircraft makers adopted hardening. Keywords: Hardening Technique, Integrated Circuits, Radiation DOI: 10.7176/CEIS/13-5-04 Publication date:October 31st 202

Radiation Tolerant Electronics, Volume II

Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits and embedded systems. This research is strongly driven by the growing need for radiation hardened electronics for space applications, high-energy physics experiments such as those on the large hadron collider at CERN, and many terrestrial nuclear applications, including nuclear energy and safety management. With the progressive scaling of integrated circuit technologies and the growing complexity of electronic systems, their ionizing radiation susceptibility has raised many exciting challenges, which are expected to drive research in the coming decade.After the success of the first Special Issue on Radiation Tolerant Electronics, the current Special Issue features thirteen articles highlighting recent breakthroughs in radiation tolerant integrated circuit design, fault tolerance in FPGAs, radiation effects in semiconductor materials and advanced IC technologies and modelling of radiation effects

The Characterization of a CMOS Radiation Hardened-by-Design Circuit Technique

This thesis presents the analysis, implementation and testing of a circuit-level radiation hardened-by-design (RHBD) technique first presented in [1]. Radiation effects heavily influence the cost and design of electronics bound for radiation-rich environments such as in nuclear reactors or space. The circuit-level RHBD technique is presented as a cost-effective way to mitigate total-ionizing dose (TID) radiation in digital complementary metal-oxide-semiconductor (CMOS) transistor circuits. These claims are analyzed and experimentally tested. Devices from a relatively old and a newer semiconductor fabrication process are tested to investigate the impact of device scaling on the RHBD technique’s effectiveness. A rad-tolerant frequency synthesizer that implements this technique is discussed. Challenges in the project included implementing efficient testing procedures at the radiation test facilities. Testing time was limited and in-situ­ test methodologies utilizing LabView programs were used effectively